Commit Graph

54 Commits

Author SHA1 Message Date
8bb34f2593 schip: Improve architecture & compatibility somewhat 2023-04-03 05:46:33 -05:00
9fcae555ce chirp-minifb: Add quirk toggles back in 2023-04-03 05:45:22 -05:00
acc7629516 schip: Add preliminary SuperChip support (no test) 2023-04-03 02:01:25 -05:00
93bbf67433 cpu.rs: Double max IPF in dynamic timing by only getting the time once 2023-04-02 14:48:34 -05:00
03a6934a59 tests.rs: BC_test tests flawed behavior. 2023-04-02 14:47:33 -05:00
83cc35c968 Move submodules to project root 2023-04-02 14:45:32 -05:00
89f66c3d5b Add chip8Archive as a submodule, for testing 2023-04-02 14:21:43 -05:00
f27537b3b8 tests: Update tests to match current behavior. 2023-04-01 02:31:51 -05:00
a4c548d0ec lib.rs: Remove crate::prelude, re-export in lib.rs 2023-04-01 02:31:06 -05:00
bb8015f33c Quirks: Make the Cosmac VIP behavior default. 2023-04-01 00:15:40 -05:00
7173b9e39b Break io into chirp-minifb, and refactor to use Results in more places 2023-04-01 00:14:15 -05:00
a676280ec8 clippy: Fix all clippy lints 2023-03-31 14:32:01 -05:00
627511282a chirp-minifb: Propagate errors up to main 2023-03-30 10:46:35 -05:00
c1f457814d disassembler: 100% line coverage 2023-03-30 08:53:10 -05:00
cc3bc3a7fe Major Refactor: Make invalid states unrepresentable™️
- Rewrote the instruction decoder as an enum
- Used imperative_rs to auto-generate the bit twiddling logic
- Implemented Display on that enum, for disassembly
- Rewrote CPU::tick
  - Now >10x faster
  - Disassembly mode is still 5x slower though
- Implemented time-based benchmarking
  - (use option -S to set the number of instructions per epoch)
2023-03-30 08:27:06 -05:00
8ab9799913 cpu.rs: Fix some documentation errors 2023-03-30 02:13:59 -05:00
f60a4b3cc2 Refactor disassembler to use imperative-rs
It's like MAGIC. Easily cut out 200 LOC
2023-03-30 02:12:03 -05:00
e54f66f6c4 disassemble.rs: Update function names to match cpu.rs 2023-03-29 23:46:57 -05:00
b9c35c0e68 lib.rs: Deny (missing docs) 2023-03-29 23:45:39 -05:00
c194a3c53a Error: Remove FunkyMathError and Stringly Typed context 2023-03-29 23:42:41 -05:00
9195d439e3 Prepare for migration to iced 2023-03-29 23:37:12 -05:00
b7c3e3113d Fix the last few instances of "chumpulator" 2023-03-29 12:29:07 -05:00
ce0dc954d0 tests: Improve cpu.rs line coverage to >99% 2023-03-28 12:31:56 -05:00
83c178413d tests: Further improvements to overall system stability and other minor adjustments have been made to enhance the user experience. 2023-03-28 08:57:24 -05:00
f2f47e13d4 bus: Change named ranges from hashmap to array
Improves performance by 0.4 seconds in unit tests
2023-03-28 07:35:18 -05:00
fbc0a0b2ea tests: Coverage and cleanup/speedup
- Improved test coverage to >80% of lines, functions
  - When doctests are included.
  - Wrote new unit tests:
    - Explicit tests for invalid instructions in the
      ranges {`5xyn`, `8xyn`, `9xyn`, `Fxbb`}
    - `rand` Tests for 1052671 cycles, to ensure
      randomly generated number is < ANDed byte
    - `Ex9E` (sek), `ExA1`(snek) will press only the expected key,
      then every key except the expected key, for every address
    - `Fx0A` (waitk) asserts based on the waveform of a keypress.
      After all, an A press is an A press.
- Improved test performance by printing slightly less
- Removed nightly requirement
  - (now optional, with feature = "unstable")
- Amended justfile to test with `cargo nextest` (nice)
- Changed release builds to optlevel 3
2023-03-28 07:33:17 -05:00
59a0b2fada bus.rs/cpu.rs: Improve doctest coverage 2023-03-27 21:01:57 -05:00
d5cfdc6802 tests: Move chip8-test-suite to integration tests. 2023-03-27 21:01:33 -05:00
b8720142c7 disassemble.rs: Make asm format more consistent. 2023-03-27 18:31:18 -05:00
0e91b103ed LICENSE: Add MIT Licence 2023-03-27 18:30:31 -05:00
784845b6f5 cpu.rs: Make quirks individually configurable 2023-03-27 17:27:55 -05:00
85956504d7 UI: Refactor library module to promote code reuse 2023-03-27 17:27:05 -05:00
dbc96648f1 bus.rs: Make hex-dumping optional to cut deps 2023-03-27 17:23:41 -05:00
a40ee94499 cpu/tests: Add chip8-test-suite, organize tests 2023-03-27 17:21:23 -05:00
4b5de191d8 cpu/tests.rs: Use instruction function directly in non-parser tests 2023-03-26 19:04:36 -05:00
f9f6510c75 main.rs: Periods in helptext 2023-03-26 19:03:25 -05:00
185712aeb6 cpu/tests.rs: Modularize and add new tests 2023-03-26 18:33:12 -05:00
a2a44dfd4f cpu.rs: Make private function names more concise 2023-03-26 18:32:31 -05:00
5520d4ab69 io.rs: Dump memory to file (already used by main, oops!) 2023-03-25 18:33:05 -05:00
edd2b60665 cpu.rs: Refactor dump(&self) to do fewer allocations 2023-03-25 18:32:45 -05:00
47fa41fd01 main.rs/lib.rs: Refactor to make it more funny 2023-03-25 18:19:06 -05:00
5355e10218 Add utility binaries for disassembly and screenshot viewing 2023-03-25 18:17:55 -05:00
73a69f3469 cpu.rs: Create unit tests for most instructions 2023-03-25 18:17:09 -05:00
27ac674616 cpu.rs: Refactor instruction implementations
- Use rust standard implementations of overflowing arithmetic
- Make draw more concise and readable
2023-03-25 18:14:36 -05:00
5159afa3fd cpu.rs: Reference chaining mutable functions 2023-03-25 18:09:41 -05:00
49a6fc0377 dump.rs: Does not spark joy (remove dump.rs) 2023-03-25 17:45:22 -05:00
4ab7dcbe6a main.rs: General cleanup in preparation for refactor 2023-03-25 17:42:06 -05:00
f3badf41e8 io.rs: QOL fixups; Reuse WindowBuilder, #[derive(...)] FrameBufferFormat 2023-03-25 17:39:03 -05:00
c7447a26a3 disassemble.rs: Format with rustfmt 2023-03-25 17:37:09 -05:00
712acc5984 bus.rs: Improve region encoding with enums 2023-03-25 17:20:20 -05:00