223 lines
11 KiB
Rust
223 lines
11 KiB
Rust
use super::*;
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/// Creates a [Parsable] implementation for an enum whose variants
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/// are named after other [Parsable] items
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macro make_parsable($(#[$meta:meta])* $vis:vis enum $id:ident {$($(#[$vmeta:meta])*$v:ident),*$(,)?}) {
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$( #[$meta] )* $vis enum $id {$($(#[$vmeta])*$v($v),)* }
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impl ::msp430_asm::parser::parsable::Parsable for $id {
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fn parse<'text, T>(p: &Parser, stream: &mut T) -> Result<Self, ParseError>
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where T: TokenStream<'text> {
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$(if let Some(v) = Parsable::try_parse(p, stream)? { Ok(Self::$v(v)) } else )*
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{ Err(ParseError::UnrecognizedDirective("".into())) }
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}
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}
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impl TryFrom<&str> for $id {
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type Error = ParseError;
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fn try_from(value: &str) -> Result<Self, Self::Error> {
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Parsable::parse(&Parser::default(), &mut Tokenizer::new(value).ignore(Type::Space).preprocessed())
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}
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}
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}
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make_parsable! {
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#[derive(Debug)]
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pub enum SyntaxFragment {
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Opcode,
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PrimaryOperand,
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Number,
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}
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}
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impl SyntaxFragment {
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pub fn info(&self) {
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match self {
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SyntaxFragment::Opcode(o) => Self::opcode_info(o),
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SyntaxFragment::PrimaryOperand(o) => Self::operand_info(o),
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SyntaxFragment::Number(n) => println!("The number {n}"),
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}
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}
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fn opcode_info(o: &Opcode) {
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let (desc, as_rust) = usage(o);
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println!("Usage: {o}{}\n{desc} ( {as_rust} )", params(o));
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footer!("https://mspgcc.sourceforge.net/manual/x223.html");
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}
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// TODO: re-enable full instruction decoding
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// fn encoding_info(e: &Encoding) {
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// match e {
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// Encoding::Single { dst, .. } => Self::operand_info(dst),
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// Encoding::Jump { target } => println!("Jumps to (pc + {target})"),
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// Encoding::Double { src, dst, .. } => {
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// Self::operand_info(src);
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// Self::operand_info(&dst.clone().into())
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// }
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// }
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// }
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fn operand_info(o: &PrimaryOperand) {
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match o {
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PrimaryOperand::Direct(r) => Self::register_info(r),
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PrimaryOperand::Indirect(r) => {
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Self::register_info(r);
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println!("Indirect addressing mode: use data pointed to by {r}");
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}
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PrimaryOperand::PostInc(r) => {
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Self::register_info(r);
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println!("Indirect post-increment mode: use data pointed to by {r}, then increment {r}");
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}
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PrimaryOperand::Indexed(r, n) => {
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Self::register_info(r);
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println!("Indexed mode: use the data at {r}[{n}]");
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}
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PrimaryOperand::Relative(_) => return,
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PrimaryOperand::Absolute(n) => println!("Absolute mode: use the data at absolute address {n}"),
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PrimaryOperand::Immediate(n) => println!("Immediate mode: the constant {n}"),
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PrimaryOperand::Four => println!("#4 mode: Immediate 4 is encoded @sr"),
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PrimaryOperand::Eight => println!("#8 mode: Immediate 8 is encoded @sr+"),
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PrimaryOperand::Zero => println!("#0 mode: Immediate 0 is encoded cg (r3)"),
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PrimaryOperand::One => println!("#1 mode: Immediate 1 is encoded _(cg), where _ is a nonexistent ext-word"),
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PrimaryOperand::Two => println!("#2 mode: Immediate 2 is encoded @cg"),
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PrimaryOperand::MinusOne => println!("#-1 mode: the all-ones constant, is encoded @cg+"),
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}
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footer!("https://mspgcc.sourceforge.net/manual/x82.html");
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}
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fn register_info(r: &Register) {
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use Register as Re;
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match r {
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Re::pc => println!("pc (r0) is the Program Counter. Post-increment addressing will increase it by 2."),
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Re::sp => println!("sp (r1) is the Stack Pointer. Post-increment addressing will increase it by 2."),
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Re::sr => println!(
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"sr (r2) is the Status Register. It has arithmetic flags: oVerflow, Negative, Zero, and Carry;\nInterrupt Enable; and toggles for various clock/sleep functions.\n8\t7\t6\t5\t4\t3\t2\t1\t0\nV\tSCG1\tSCG1\tOSCOFF\tCPUOFF\tGIE\tN\tZ\tC",
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),
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Re::cg => println!("cg (r3) is the Constant Generator. It's hard-wired to zero."),
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Re::r4 | Re::r5 | Re::r6 | Re::r7 | Re::r8 | Re::r9 | Re::r10 | Re::r11 => {
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println!("{r} is a callee-saved general purpose register.")
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}
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Re::r12 | Re::r13 | Re::r14 | Re::r15 => {
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println!("{r} is a caller-saved general purpose register, allowed for return values.")
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}
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}
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}
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}
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// Gets parameter usage information from the opcode's EncodingParser
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pub fn params(opcode: &Opcode) -> &'static str {
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match opcode.resolve().1 {
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EncodingParser::Jump { target: None } => " target (relative address or label)",
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EncodingParser::Single { width: None, dst: None } => "[.b] dst",
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EncodingParser::Single { dst: None, .. } => " dst",
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EncodingParser::Double { src: None, dst: None, .. } => "[.b] src, dst",
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EncodingParser::Double { src: None, .. } => "[.b] src",
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EncodingParser::Double { dst: None, .. } => "[.b] dst",
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EncodingParser::Double { .. } => "[.b]",
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EncodingParser::Reflexive { reg: None, .. } => "[.b] dst",
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_ => "",
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}
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}
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pub fn usage(opcode: &Opcode) -> (&'static str, &'static str) {
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match opcode {
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// Single
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Opcode::Rrc => ("Rotates dst right, through carry flag", "dst = (dst >> 1) | (sr[C] << 15)"),
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Opcode::Swpb => ("Swaps the high and low byte of dst", "dst.swap_bytes()"),
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Opcode::Rra => ("Shifts dst right, sign-extending the result", "dst >>= 1"),
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Opcode::Sxt => ("Sign-extends the 8-bit dst to 16-bits", "dst as i16 << 8 >> 8"),
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Opcode::Push => ("Pushes dst to the stack", "stack.push(dst)"),
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Opcode::Call => ("Calls a subroutine at an absolute address", "dst()"),
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Opcode::Reti => ("Return from interrupt handler", "{ sr = stack.pop(); pc = stack.pop() }"),
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// Jump
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Opcode::Jnz => ("Jump if the last result was not zero", "if !Z { pc += target }"),
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Opcode::Jz => ("Jump if the last result was zero", "if Z { pc += target }"),
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Opcode::Jnc => ("Jump if the last operation did not carry", "if !C { pc += target }"),
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Opcode::Jc => ("Jump if the last operation produced a carry bit", "if C { pc += target }"),
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Opcode::Jn => ("Jump if the last result was negative", "if N { pc += target }"),
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Opcode::Jge => ("Jump if the flags indicate src >= dst", "if sr[C] == sr[V] { pc += target }"),
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Opcode::Jl => ("Jump if the flags indicate src < dst", "if sr[C] != sr[V] { pc += target }"),
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Opcode::Jmp => ("Jump unconditionally", "pc += target"),
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// Double
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Opcode::Mov => ("Copy src into dst", "dst = src"),
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Opcode::Add => ("Add src to dst", "dst += src"),
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Opcode::Addc => ("Add src to dst with carry", "dst += src + sr[C]"),
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Opcode::Subc => ("Subtract src from dst with carry", "dst -= src - sr[C]"),
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Opcode::Sub => ("Subtract src from dst", "dst -= src"),
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Opcode::Cmp => ("Subtract src from dst, but discard the result, keeping the flags", "dst - src"),
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Opcode::Dadd => ("Add src to dst in Binary Coded Decimal", "dst = dst as BCD + src as BCD"),
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Opcode::Bit => ("Test if bits in src are set in dst", "(src & dst).cmp(0)"),
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Opcode::Bic => ("Clear bits in dst that are set in src, without changing flags", "dst &= !src"),
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Opcode::Bis => ("Set bits in dst that are set in src, without changing flags", "dst |= src"),
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Opcode::Xor => ("Bitwise Xor src into dst", "dst ^= src"),
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Opcode::And => ("Bitwise And src into dst", "dst &= src"),
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// Emulated
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Opcode::Nop => ("Does nothing", "{}"),
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Opcode::Pop => ("Pops a value from the stack", "dst = stack.pop()"),
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Opcode::Br => ("Branches to the absolute address in src", "pc = src"),
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Opcode::Ret => ("Returns from subroutine", "pc = stack.pop()"),
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Opcode::Clrc => ("Clears the carry flag", "sr[C] = 0"),
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Opcode::Setc => ("Sets the carry flag", "sr[C] = 1"),
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Opcode::Clrz => ("Clears the zero flag", "sr[Z] = 0"),
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Opcode::Setz => ("Sets the zero flag", "sr[Z] = 1"),
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Opcode::Clrn => ("Clears the negative flag", "sr[N] = 0"),
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Opcode::Setn => ("Sets the negative flag", "sr[N] = 1"),
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Opcode::Dint => ("Disables interrupts", "sr[GIE] = 0"),
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Opcode::Eint => ("Enables interrupts", "sr[GIE] = 1"),
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Opcode::Rla => ("Shifts dst to the left, padding with zeros", "dst <<= 1"),
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Opcode::Rlc => ("Rotates dst to the left, through carry flag", "dst = (dst << 1) + sr[C]"),
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Opcode::Inv => ("Inverts the bits in dst", "dst = !dst"),
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Opcode::Clr => ("Sets dst to 0", "dst = 0"),
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Opcode::Tst => ("Sets the status register flags (CNZV) using dst", ""),
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Opcode::Dec => ("Decrements dst", "dst -= 1"),
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Opcode::Decd => ("Decrements dst by 2 (one processor word)", "dst -= 2"),
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Opcode::Inc => ("Increments dst", "dst += 1"),
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Opcode::Incd => ("Increments dst by 2 (one processor word)", "dst += 2"),
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Opcode::Adc => ("Adds the carry bit to dst", "dst += sr[C]"),
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Opcode::Dadc => ("Adds the carry bit to dst, in Binary Coded Decimal", "dst as BCD = sr[C]"),
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Opcode::Sbc => ("Subtracts the carry bit from dst", "dst -= sr[C]"),
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}
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}
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const SINGLE: [Opcode; 7] =
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[Opcode::Rrc, Opcode::Swpb, Opcode::Rra, Opcode::Sxt, Opcode::Push, Opcode::Call, Opcode::Reti];
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const JUMP: [Opcode; 8] =
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[Opcode::Jnz, Opcode::Jz, Opcode::Jnc, Opcode::Jc, Opcode::Jn, Opcode::Jge, Opcode::Jl, Opcode::Jmp];
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#[rustfmt::skip]
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const DOUBLE: [Opcode; 12] = [
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Opcode::Mov, Opcode::Add, Opcode::Addc, Opcode::Subc, Opcode::Sub, Opcode::Cmp,
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Opcode::Dadd, Opcode::Bit, Opcode::Bic, Opcode::Bis, Opcode::Xor, Opcode::And,
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];
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#[rustfmt::skip]
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const SIMULATED: [Opcode; 24] = [
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Opcode::Nop, Opcode::Pop, Opcode::Br, Opcode::Ret, Opcode::Clrc, Opcode::Setc,
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Opcode::Clrz, Opcode::Setz, Opcode::Clrn, Opcode::Setn, Opcode::Dint, Opcode::Eint,
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Opcode::Rla, Opcode::Rlc, Opcode::Inv, Opcode::Clr, Opcode::Tst, Opcode::Dec,
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Opcode::Decd, Opcode::Inc, Opcode::Incd, Opcode::Adc, Opcode::Dadc, Opcode::Sbc,
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];
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pub fn list_opcodes() {
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let mut stdout = std::io::stdout().lock();
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header!(stdout, "Single-operand instructions:");
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let _ = write_opcode_list(&mut stdout, &SINGLE);
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header!(stdout, "Relative Jump instructions:");
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let _ = write_opcode_list(&mut stdout, &JUMP);
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header!(stdout, "Double-operand instructions:");
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let _ = write_opcode_list(&mut stdout, &DOUBLE);
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header!(stdout, "Simulated instructions:");
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let _ = write_opcode_list(&mut stdout, &SIMULATED);
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}
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fn write_opcode_list(mut f: impl std::io::Write, list: &[Opcode]) -> std::io::Result<()> {
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for (idx, opcode) in list.iter().enumerate() {
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write!(f, "{opcode}{}", if idx % 6 == 5 { "\n" } else { "\t" })?;
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}
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if list.len() % 6 != 0 {
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writeln!(f)?;
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}
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Ok(())
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}
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macro header ($f:ident, $($x: expr),+) {
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{write!($f, "{}",SetForegroundColor(Color::Cyan)).ok();write!($f, $($x),+).ok();writeln!($f, "{}",ResetAttributes).ok();}
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}
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macro footer ($($x: expr),+) {
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{print!("{}",SetForegroundColor(Color::DarkGray));print!($($x),+);println!("{}",ResetAttributes);}
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}
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