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12 Commits

Author SHA1 Message Date
John Breaux
c1219e60f0 cpu.rs: Refactor for modularity 
- Break into submodules
  - Move bus into submodule of CPU
  - Keep program and charset rom inside CPU
  - Take only the screen on the external Bus
  - Refactor the disassembler into an instruction definition and the actual "Dis" item
 2023-04-23 12:10:02 -05:00
John Breaux
92dc899510 Update copyright notices 2023-04-23 11:58:57 -05:00
John Breaux
381b2a69bd tests: load_region asserts that all data must be copied 2023-04-17 05:26:49 -05:00
John Breaux
bafb576705 chip8-test-suite: Update to 4.0 2023-04-17 05:04:23 -05:00
John Breaux
674af62465 cpu.rs: Break into submodules 2023-04-14 21:25:41 -05:00
John Breaux
acc7629516 schip: Add preliminary SuperChip support (no test) 2023-04-03 02:01:25 -05:00
John Breaux
40cc81181b chip8_test_suite.rs: Load program only once 2023-04-02 14:46:39 -05:00
John Breaux
83cc35c968 Move submodules to project root 2023-04-02 14:45:32 -05:00
John Breaux
a4c548d0ec lib.rs: Remove crate::prelude, re-export in lib.rs 2023-04-01 02:31:06 -05:00
John Breaux
bb8015f33c Quirks: Make the Cosmac VIP behavior default. 2023-04-01 00:15:40 -05:00
John Breaux
cc3bc3a7fe Major Refactor: Make invalid states unrepresentable™️ 
- Rewrote the instruction decoder as an enum
- Used imperative_rs to auto-generate the bit twiddling logic
- Implemented Display on that enum, for disassembly
- Rewrote CPU::tick
  - Now >10x faster
  - Disassembly mode is still 5x slower though
- Implemented time-based benchmarking
  - (use option -S to set the number of instructions per epoch)
 2023-03-30 08:27:06 -05:00
John Breaux
84361597cc tests: Clean up integration tests 2023-03-27 21:31:54 -05:00