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disassemble.rs: Make asm format more consistent.

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John 2023-03-27 18:31:18 -05:00
parent 0e91b103ed
commit b8720142c7
2 changed files with 8 additions and 7 deletions
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14
src/cpu/disassemble.rs
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@ -336,14 +336,14 @@ impl Disassemble {
/// DT = vX /// DT = vX
/// ``` /// ```
pub fn load_delay_timer(&self, x: Reg) -> String { pub fn load_delay_timer(&self, x: Reg) -> String {
format!("ld v{x:X}, DT").style(self.normal).to_string() format!("mov v{x:X}, DT").style(self.normal).to_string()
} }
/// `Fx18`: Load vX into ST /// `Fx18`: Load vX into ST
/// ```py /// ```py
/// ST = vX; /// ST = vX;
/// ``` /// ```
pub fn load_sound_timer(&self, x: Reg) -> String { pub fn load_sound_timer(&self, x: Reg) -> String {
format!("ld v{x:X}, ST").style(self.normal).to_string() format!("mov v{x:X}, ST").style(self.normal).to_string()
} }
/// `Fx1e`: Add vX to I, /// `Fx1e`: Add vX to I,
/// ```py /// ```py
@ -352,24 +352,24 @@ impl Disassemble {
pub fn add_to_indirect(&self, x: Reg) -> String { pub fn add_to_indirect(&self, x: Reg) -> String {
format!("add v{x:X}, I").style(self.normal).to_string() format!("add v{x:X}, I").style(self.normal).to_string()
} }
/// `Fx29`: Load sprite for character x into I /// `Fx29`: Load sprite for character in vX into I
/// ```py /// ```py
/// I = sprite(X); /// I = sprite(X);
/// ``` /// ```
pub fn load_sprite_x(&self, x: Reg) -> String { pub fn load_sprite_x(&self, x: Reg) -> String {
format!("font #{x:X}, I").style(self.normal).to_string() format!("font v{x:X}, I").style(self.normal).to_string()
} }
/// `Fx33`: BCD convert X into I`[0..3]` /// `Fx33`: BCD convert X into I`[0..3]`
pub fn bcd_convert_i(&self, x: Reg) -> String { pub fn bcd_convert_i(&self, x: Reg) -> String {
format!("bcd {x:X}, &I").style(self.normal).to_string() format!("bcd v{x:X}, &I").style(self.normal).to_string()
} }
/// `Fx55`: DMA Stor from I to registers 0..X /// `Fx55`: DMA Stor from I to registers 0..X
pub fn dma_store(&self, x: Reg) -> String { pub fn dma_store(&self, x: Reg) -> String {
format!("dmao {x:X}").style(self.normal).to_string() format!("dmao v{x:X}").style(self.normal).to_string()
} }
/// `Fx65`: DMA Load from I to registers 0..X /// `Fx65`: DMA Load from I to registers 0..X
pub fn dma_load(&self, x: Reg) -> String { pub fn dma_load(&self, x: Reg) -> String {
format!("dmai {x:X}").style(self.normal).to_string() format!("dmai v{x:X}").style(self.normal).to_string()
} }
} }

1
src/cpu/tests.rs
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@ -841,6 +841,7 @@ mod io {
} }
/// These are a series of interpreter tests using Timendus's incredible test suite /// These are a series of interpreter tests using Timendus's incredible test suite
/// TODO: These are technically integration tests, and should be moved to src/tests
mod chip8_test_suite { mod chip8_test_suite {
use super::*; use super::*;