From b8720142c710b24330f2e3ee2eaa33cd04bdcbca Mon Sep 17 00:00:00 2001
From: John Breaux <j@soft.fish>
Date: Mon, 27 Mar 2023 18:31:18 -0500
Subject: [PATCH] disassemble.rs: Make asm format more consistent.

---
 src/cpu/disassemble.rs | 14 +++++++-------
 src/cpu/tests.rs       |  1 +
 2 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/src/cpu/disassemble.rs b/src/cpu/disassemble.rs
index ba147ff..871e5bf 100644
--- a/src/cpu/disassemble.rs
+++ b/src/cpu/disassemble.rs
@@ -336,14 +336,14 @@ impl Disassemble {
     /// DT = vX
     /// ```
     pub fn load_delay_timer(&self, x: Reg) -> String {
-        format!("ld     v{x:X}, DT").style(self.normal).to_string()
+        format!("mov    v{x:X}, DT").style(self.normal).to_string()
     }
     /// `Fx18`: Load vX into ST
     /// ```py
     /// ST = vX;
     /// ```
     pub fn load_sound_timer(&self, x: Reg) -> String {
-        format!("ld     v{x:X}, ST").style(self.normal).to_string()
+        format!("mov    v{x:X}, ST").style(self.normal).to_string()
     }
     /// `Fx1e`: Add vX to I,
     /// ```py
@@ -352,24 +352,24 @@ impl Disassemble {
     pub fn add_to_indirect(&self, x: Reg) -> String {
         format!("add    v{x:X}, I").style(self.normal).to_string()
     }
-    /// `Fx29`: Load sprite for character x into I
+    /// `Fx29`: Load sprite for character in vX into I
     /// ```py
     /// I = sprite(X);
     /// ```
     pub fn load_sprite_x(&self, x: Reg) -> String {
-        format!("font   #{x:X}, I").style(self.normal).to_string()
+        format!("font   v{x:X}, I").style(self.normal).to_string()
     }
     /// `Fx33`: BCD convert X into I`[0..3]`
     pub fn bcd_convert_i(&self, x: Reg) -> String {
-        format!("bcd    {x:X}, &I").style(self.normal).to_string()
+        format!("bcd    v{x:X}, &I").style(self.normal).to_string()
     }
     /// `Fx55`: DMA Stor from I to registers 0..X
     pub fn dma_store(&self, x: Reg) -> String {
-        format!("dmao   {x:X}").style(self.normal).to_string()
+        format!("dmao   v{x:X}").style(self.normal).to_string()
     }
     /// `Fx65`: DMA Load from I to registers 0..X
     pub fn dma_load(&self, x: Reg) -> String {
-        format!("dmai   {x:X}").style(self.normal).to_string()
+        format!("dmai   v{x:X}").style(self.normal).to_string()
     }
 }
 
diff --git a/src/cpu/tests.rs b/src/cpu/tests.rs
index 8707ae9..1fde075 100644
--- a/src/cpu/tests.rs
+++ b/src/cpu/tests.rs
@@ -841,6 +841,7 @@ mod io {
 }
 
 /// These are a series of interpreter tests using Timendus's incredible test suite
+/// TODO: These are technically integration tests, and should be moved to src/tests
 mod chip8_test_suite {
     use super::*;