;© 2023 John Breaux
; examples of valid assembly
;

; testing labels
jmp main

; testing directives
.string "ABA"
.string "ABAB"
.word 0b0101101001011010
.words [0xdead 0xbeef 0x0000]

main:
; testing defines
.define asdfgh #0x1000
.define qwerty @sp+
br asdfgh
mov qwerty, r15



_register_mode:
.define numbered r1
mov r0, r1
mov r1, r2
mov r2, r3
mov r3, r4
mov r4, r5
mov r5, r6
mov r6, r7
mov r7, r8
mov r8, r9
mov r9, r10
mov r10, r11
mov r11, r12
mov r12, r13
mov r13, r14
mov r14, r15

.define special r2
mov pc, r15
mov sp, r15
mov sr, r15
mov cg, r15


indirect_mode:
.define numbered r3
mov @r0, r1
mov @r1, r2
;mov @r2, r3
;mov @r3, r4
mov @r4, r5
mov @r5, r6
mov @r6, r7
mov @r7, r8
mov @r8, r9
mov @r9, r10
mov @r10, r11
mov @r11, r12
mov @r12, r13
mov @r13, r14
mov @r14, r15

.define special r4
mov @pc, r15
mov @sp, r15
;mov @sr, r15 ; These are part of encodings for #immediate values [-1, 0, 1, 2, 4, 8]
;mov @cg, r15

indirect_pi_mode:
.define numbered r5
;mov @r0+, r1
mov @r1+, r2
;mov @r2+, r3
;mov @r3+, r4
mov @r4+, r5
mov @r5+, r6
mov @r6+, r7
mov @r7+, r8
mov @r8+, r9
mov @r9+, r10
mov @r10+, r11
mov @r11+, r12
mov @r12+, r13
mov @r13+, r14
mov @r14+, r15

.define special r6
; mov , r14
; mov @pc+, r15 ; This is a mov-immediate, and may corrupt your output
mov @sp+, r15 ; pop r15
mov @sr+, r15 ; These are part of encodings for #immediate values [-1, 0, 1, 2, 4, 8]
mov @cg+, r15

indexed_mode:
.define numbered r7
mov.b 0x10(r0), r1
mov 0x10(r1), r2
;mov 10(r2), r3 ; Invalid: cannot index relative to sr
;mov 10(r3), r4 ; Invalid: cannot index relative to cg
mov 0x10(r4), r5
mov 0x10(r5), r6
mov 0x10(r6), r7
mov 0x10(r7), r8
mov 0x10(r8), r9
mov 0x10(r9), r10
mov 0x10(r10), r11
mov 0x10(r11), r12
mov 0x10(r12), r13
mov 0x10(r13), r14
mov 0x10(r14), r15

.define special r8
mov 0x10(pc), r15
mov 0x10(sp), r15
;mov 10(sr), r15 ; These are part of encodings for #immediate values [-1, 0, 1, 2, 4, 8]
;mov 10(cg), r15

_immediate_mode:
.define numbered r9
mov #0xbeef, r0
mov #0xbeef, r1
mov #0xbeef, r2
mov #0xbeef, r3
mov #0xbeef, r4
mov #0xbeef, r5
mov #0xbeef, r6
mov #0xbeef, r7
mov #0xbeef, r8
mov #0xbeef, r9
mov #0xbeef, r10
mov #0xbeef, r11
mov #0xbeef, r12
mov #0xbeef, r13
mov #0xbeef, r14
mov #0xbeef, r15

.define special r10
mov #0xbeef, pc
mov #0xbeef, sp
mov #0xbeef, sr
mov #0xbeef, cg

jmp _register_mode
jmp 0x3fe
jmp -0x3fc
ret

; Funky encodings
mov r6,         r4
mov @r6,        r4
mov @r6+,       r4
mov 0x0(r6),    r4
mov 0x4141(r6), r4
mov #-1,        r4
mov #0xffff,    r4
mov #0,         r4
mov #1,         r4
mov #2,         r4
mov #4,         r4
mov #8,         r4
mov r6,         0(r4)
mov @r6,        0(r4)
mov @r6+,       0(r4)
mov 0(r6),      0(r4)
mov 0x4141(r6), 0(r4)
mov #-1,        0(r4)
mov #0xffff,    0(r4)
mov #0,         0(r4)
mov #1,         0(r4)
mov #2,         0(r4)
mov #4,         0(r4)
mov #8,         0(r4)
mov r6,         0x4141(r4)
mov @r6,        0x4141(r4)
mov @r6+,       0x4141(r4)
mov 0(r6),      0x4141(r4)
mov 0x4141(r6), 0x4141(r4)
mov #-1,        0x4141(r4)
mov #0xffff,    0x4141(r4)
mov #0,         0x4141(r4)
mov #1,         0x4141(r4)
mov #2,         0x4141(r4)
mov #4,         0x4141(r4)
mov #8,         0x4141(r4)
mov r6,         #0
mov @r6,        #0
mov @r6+,       #0
mov 0(r6),      #0
mov 0x4141(r6), #0
mov #-1,        #0
mov #0xffff,    #0
mov #0,         #0
mov #1,         #0
mov #2,         #0
mov #4,         #0
mov #8,         #0
mov r6,         #1
mov @r6,        #1
mov @r6+,       #1
mov 0(r6),      #1
mov 0x4141(r6), #1
mov #-1,        #1
mov #0xffff,    #1
mov #0,         #1
mov #1,         #1
mov #2,         #1
mov #4,         #1
mov #8,         #1

; Instruction exercise
; Jumps
jne 0x10
jeq 0x10
jlo 0x10
jhs 0x10
jn  0x10
jge 0x10
jl  0x10
jmp 0x10

; Two-ops
mov  r14, r15
add  r14, r15
addc r14, r15
subc r14, r15
sub  r14, r15
cmp  r14, r15
dadd r14, r15
bit  r14, r15
bic  r14, r15
bis  r14, r15
xor  r14, r15
and  r14, 0x10(r15)

; One-ops
rrc  r15
swpb r15
rra  r15
sxt  r15
push r15
call r15
; reti is special
reti

; Jump aliases
jnc 0x10
jnz 0x10
jc  0x10
jz  0x10

; "emulated" no-op instructions
ret
clrc
setc
clrz
setz
clrn
setn
dint
eint
nop

; "emulated" one-op instructions
br   r15
pop  r15
rla  r15
rlc  r15
inv  r15
clr  r15
tst  r15
dec  r15
decd r15
inc  r15
incd r15
adc  r15
dadc r15
sbc  r15