Chirp/Cargo.toml
John Breaux ef3d765651 experimentation: benchmarking and alternate impl's
- Do some basic benchmarking with std::time
- Try writing bus writer based on iterator
  - Fail, because that requires mutable iterator
  - Begin rewriting bus based on simpler design instead.
    - Simpler design uses a unified memory model,
      which grows based on the maximum addresses expected in it
    - Still uses the "infallible" Read/Write traits from previous
      implementation. :( Alas, it's much faster during operation,
      even if it takes longer to instantiate.
    - Reassessed the syntax for bus macro
  - Made CPU tick generic over bus::Read and bus::Write traits
2023-03-17 20:06:31 -05:00

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TOML

[package]
name = "chumpulator"
version = "0.1.0"
edition = "2021"
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
[dependencies]
owo-colors = "^3"
rhexdump = "0.1.1"
serde = { version = "^1.0", features = ["derive"] }
thiserror = "1.0.39"