842 lines
27 KiB
Rust
842 lines
27 KiB
Rust
// (c) 2023 John A. Breaux
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// This code is licensed under MIT license (see LICENSE.txt for details)
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//! Tests for cpu.rs
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//!
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//! These run instructions, and ensure their output is consistent with previous builds
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use super::*;
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pub(self) use crate::{
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bus,
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bus::{Bus, Region::*},
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};
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fn setup_environment() -> (CPU, Bus) {
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(
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CPU {
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flags: ControlFlags {
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debug: true,
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pause: false,
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monotonic: Some(8),
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..Default::default()
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},
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..CPU::default()
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},
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bus! {
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// Load the charset into ROM
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Charset [0x0050..0x00A0] = include_bytes!("../mem/charset.bin"),
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// Load the ROM file into RAM
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Program [0x0200..0x1000] = include_bytes!("../../chip-8/BC_test.ch8"),
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// Create a screen
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Screen [0x0F00..0x1000] = include_bytes!("../../chip-8/IBM Logo.ch8"),
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},
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)
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}
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fn print_screen(bytes: &[u8]) {
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bus! {Screen [0..0x100] = bytes}.print_screen().unwrap()
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}
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/// Unused instructions
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///
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/// TODO: Exhaustively test unused instructions
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#[test]
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#[should_panic]
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fn unimplemented() {
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let (mut cpu, mut bus) = setup_environment();
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bus.write(0x200u16, 0xffffu16); // 0xffff is not an instruction
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cpu.tick(&mut bus);
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cpu.unimplemented(0xffff);
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}
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mod sys {
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use super::*;
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/// 0aaa: Handles a "machine language function call" (lmao)
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#[test]
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#[should_panic]
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fn sys() {
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let (mut cpu, mut bus) = setup_environment();
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bus.write(0x200u16, 0x0200u16); // 0x0200 is not one of the allowed routines
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cpu.tick(&mut bus);
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cpu.sys(0x200);
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}
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/// 00e0: Clears the screen memory to 0
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#[test]
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fn clear_screen() {
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let (mut cpu, mut bus) = setup_environment();
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cpu.clear_screen(&mut bus);
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bus.get_region(Screen)
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.expect("Expected screen, got None")
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.iter()
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.for_each(|byte| assert_eq!(*byte, 0));
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}
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/// 00ee: Returns from subroutine
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#[test]
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fn ret() {
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let test_addr = random::<u16>() & 0x7ff;
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let (mut cpu, mut bus) = setup_environment();
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let sp_orig = cpu.sp;
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// Place the address on the stack
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bus.write(cpu.sp.wrapping_add(2), test_addr);
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cpu.ret(&mut bus);
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// Verify the current address is the address from the stack
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assert_eq!(test_addr, cpu.pc);
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// Verify the stack pointer has moved
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assert!(dbg!(cpu.sp.wrapping_sub(sp_orig)) == 0x2);
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}
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}
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/// Tests control-flow instructions
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///
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/// Basically anything that touches the program counter
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mod cf {
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use super::*;
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/// 1aaa: Sets the program counter to an absolute address
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#[test]
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fn jump() {
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let (mut cpu, _) = setup_environment();
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// Test all valid addresses
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for addr in 0x000..0xffe {
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// Call an address
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cpu.jump(addr);
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// Verify the current address is the called address
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assert_eq!(addr, cpu.pc);
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}
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}
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/// 2aaa: Pushes pc onto the stack, then jumps to a
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#[test]
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fn call() {
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let test_addr = random::<u16>();
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let (mut cpu, mut bus) = setup_environment();
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// Save the current address
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let curr_addr = cpu.pc;
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// Call an address
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cpu.call(test_addr, &mut bus);
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// Verify the current address is the called address
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assert_eq!(test_addr, cpu.pc);
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// Verify the previous address was stored on the stack (sp+2)
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let stack_addr: u16 = bus.read(cpu.sp.wrapping_add(2));
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assert_eq!(stack_addr, curr_addr);
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}
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/// 3xbb: Skips the next instruction if register X == b
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#[test]
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fn skip_equals_immediate() {
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let (mut cpu, _) = setup_environment();
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for word in 0..=0xffff {
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let (a, b, addr) = (word as u8, (word >> 4) as u8, random::<u16>() & 0x7fe);
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for x in 0..=0xf {
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// set the PC to a random address
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cpu.pc = addr;
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// set the register under test to a
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cpu.v[x] = a;
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// do the thing
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cpu.skip_equals_immediate(x, b);
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// validate the result
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assert_eq!(cpu.pc, addr.wrapping_add(if dbg!(a == b) { 2 } else { 0 }));
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}
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}
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}
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/// 4xbb: Skips the next instruction if register X != b
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#[test]
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fn skip_not_equals_immediate() {
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let (mut cpu, _) = setup_environment();
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for word in 0..=0xffff {
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let (a, b, addr) = (word as u8, (word >> 4) as u8, random::<u16>() & 0x7fe);
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for x in 0..=0xf {
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// set the PC to a random address
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cpu.pc = addr;
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// set the register under test to a
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cpu.v[x] = a;
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// do the thing
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cpu.skip_not_equals_immediate(x, b);
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// validate the result
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assert_eq!(cpu.pc, addr.wrapping_add(if a != b { 2 } else { 0 }));
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}
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}
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}
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/// 5xy0: Skips the next instruction if register X != register Y
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#[test]
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fn skip_equals() {
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let (mut cpu, _) = setup_environment();
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for word in 0..=0xffff {
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let (a, b, addr) = (word as u8, (word >> 4) as u8, random::<u16>() & 0x7fe);
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for reg in 0..=0xff {
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let (x, y) = (reg & 0xf, reg >> 4);
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if x == y {
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continue;
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}
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// set the PC to a random address
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cpu.pc = addr;
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// set the registers under test to a, b
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(cpu.v[x], cpu.v[y]) = (a, b);
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// do the thing
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cpu.skip_equals(x, y);
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// validate the result
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assert_eq!(cpu.pc, addr.wrapping_add(if a == b { 2 } else { 0 }));
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}
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}
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}
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/// 9xy0: Skip next instruction if X != y
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#[test]
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fn skip_not_equals() {
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let (mut cpu, _) = setup_environment();
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for word in 0..=0xffff {
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let (a, b, addr) = (word as u8, (word >> 4) as u8, random::<u16>() & 0x7fe);
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for reg in 0..=0xff {
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let (x, y) = (reg & 0xf, reg >> 4);
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if x == y {
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continue;
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}
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// set the PC to a random address
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cpu.pc = addr;
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// set the registers under test to a, b
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(cpu.v[x], cpu.v[y]) = (a, b);
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// do the thing
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cpu.skip_not_equals(x, y);
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// validate the result
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assert_eq!(cpu.pc, addr.wrapping_add(if a != b { 2 } else { 0 }));
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}
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}
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}
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/// Badr: Jump to &adr + v0
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#[test]
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fn jump_indexed() {
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let (mut cpu, _) = setup_environment();
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// For every valid address
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for addr in 0..0x1000 {
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// For every valid offset
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for v0 in 0..=0xff {
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// set v[0] = v0
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cpu.v[0] = v0;
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// jump indexed
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cpu.jump_indexed(addr);
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// Validate register set
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assert_eq!(cpu.pc, addr.wrapping_add(v0.into()));
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}
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}
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}
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}
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mod math {
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use super::*;
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/// 6xbb: Loads immediate byte b into register vX
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#[test]
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fn load_immediate() {
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let (mut cpu, _) = setup_environment();
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for test_register in 0x0..=0xf {
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for test_byte in 0x0..=0xff {
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cpu.load_immediate(test_register, test_byte);
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assert_eq!(cpu.v[test_register], test_byte)
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}
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}
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}
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/// 7xbb: Adds immediate byte b to register vX
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#[test]
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fn add_immediate() {
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let (mut cpu, _) = setup_environment();
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for test_register in 0x0..=0xf {
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let mut sum = 0u8;
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for test_byte in 0x0..=0xff {
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// Wrapping-add to the running total (Chip-8 allows unsigned overflow)
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sum = sum.wrapping_add(test_byte);
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// Perform add #byte, vReg
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cpu.add_immediate(test_register, test_byte);
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//Verify the running total in the register matches
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assert_eq!(cpu.v[test_register], sum);
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}
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}
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}
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/// 8xy0: Loads the value of y into x
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#[test]
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fn load() {
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let (mut cpu, _) = setup_environment();
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// We use zero as a sentinel value for this test, so loop from 1 to 255
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for test_value in 1..=0xff {
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for reg in 0..=0xff {
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let (x, y) = (reg & 0xf, reg >> 4);
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if x == y {
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continue;
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}
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// Set vY to the test value
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cpu.v[y] = test_value;
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// zero X
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cpu.v[x] = 0;
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cpu.load(x, y);
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// verify results
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assert_eq!(cpu.v[x], test_value);
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assert_eq!(cpu.v[y], test_value);
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}
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}
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}
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/// 8xy1: Performs bitwise or of vX and vY, and stores the result in vX
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// TODO: Test with bin_ops quirk flag set
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#[test]
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fn or_inaccurate() {
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let (mut cpu, _) = setup_environment();
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cpu.flags.quirks.bin_ops = false;
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for word in 0..=0xffff {
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let (a, b) = (word as u8, (word >> 4) as u8);
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let expected_result = a | b;
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for reg in 0..=0xff {
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let (x, y) = (reg & 0xf, reg >> 4);
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// set the registers under test to a, b
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(cpu.v[x], cpu.v[y]) = (a, b);
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// do the thing
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cpu.or(x, y);
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// validate the result
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assert_eq!(cpu.v[x], if x == y { b } else { expected_result });
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}
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}
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}
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/// 8xy2: Performs bitwise and of vX and vY, and stores the result in vX
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// TODO: Test with bin_ops quirk flag set
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#[test]
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fn and_inaccurate() {
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let (mut cpu, _) = setup_environment();
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cpu.flags.quirks.bin_ops = false;
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for word in 0..=0xffff {
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let (a, b) = (word as u8, (word >> 4) as u8);
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let expected_result = a & b;
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for reg in 0..=0xff {
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let (x, y) = (reg & 0xf, reg >> 4);
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// set the registers under test to a, b
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(cpu.v[x], cpu.v[y]) = (a, b);
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// do the thing
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cpu.and(x, y);
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// validate the result
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assert_eq!(cpu.v[x], if x == y { b } else { expected_result });
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}
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}
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}
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/// 8xy3: Performs bitwise xor of vX and vY, and stores the result in vX
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// TODO: Test with bin_ops quirk flag set
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#[test]
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fn xor_inaccurate() {
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let (mut cpu, _) = setup_environment();
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cpu.flags.quirks.bin_ops = false;
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for word in 0..=0xffff {
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let (a, b) = (word as u8, (word >> 4) as u8);
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let expected_result = a ^ b;
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for reg in 0..=0xff {
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let (x, y) = (reg & 0xf, reg >> 4);
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// set the registers under test to a, b
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(cpu.v[x], cpu.v[y]) = (a, b);
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// do the thing
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cpu.xor(x, y);
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// validate the result
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assert_eq!(cpu.v[x], if x == y { 0 } else { expected_result });
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}
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}
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}
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/// 8xy4: Performs addition of vX and vY, and stores the result in vX, carry in vF
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/// If X is F, *only* stores borrow
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#[test]
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fn add() {
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let (mut cpu, _) = setup_environment();
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for word in 0..=0xffff {
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let (a, b) = (word as u8, (word >> 4) as u8);
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for reg in 0..=0xff {
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let (x, y) = (reg & 0xf, reg >> 4);
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// calculate the expected result
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// If x == y, a is discarded
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let (expected, carry) = if x == y { b } else { a }.overflowing_add(b);
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// set the registers under test to a, b
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(cpu.v[x], cpu.v[y]) = (a, b);
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// do the thing
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cpu.add(x, y);
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// validate the result
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// if the destination is vF, the result was discarded, and only the carry was kept
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if x != 0xf {
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assert_eq!(cpu.v[x], expected);
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}
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assert_eq!(cpu.v[0xf], carry.into());
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}
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}
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}
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/// 8xy5: Performs subtraction of vX and vY, and stores the result in vX, borrow in vF
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#[test]
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fn sub() {
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let (mut cpu, _) = setup_environment();
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for word in 0..=0xffff {
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let (a, b) = (word as u8, (word >> 4) as u8);
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for reg in 0..=0xff {
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let (x, y) = (reg & 0xf, reg >> 4);
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// calculate the expected result
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let (expected, carry) = if x == y { b } else { a }.overflowing_sub(b);
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// set the registers under test to a, b
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(cpu.v[x], cpu.v[y]) = (a, b);
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// do the thing
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cpu.sub(x, y);
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// validate the result
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// if the destination is vF, the result was discarded, and only the carry was kept
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if x != 0xf {
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assert_eq!(cpu.v[x], expected);
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}
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// The borrow flag for subtraction is inverted
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assert_eq!(cpu.v[0xf], (!carry).into());
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}
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}
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}
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/// 8xy6: Performs bitwise right shift of vX, stores carry-out in vF
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// TODO: Test with authentic flag set
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#[test]
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fn shift_right() {
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let (mut cpu, _) = setup_environment();
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for word in 0..=0xff {
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for x in 0..=0xf {
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// set the register under test to `word`
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cpu.v[x] = word;
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// do the thing
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cpu.shift_right(x, x);
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// validate the result
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// if the destination is vF, the result was discarded, and only the carry was kept
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if x != 0xf {
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assert_eq!(cpu.v[x], word >> 1);
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}
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// The borrow flag for subtraction is inverted
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assert_eq!(cpu.v[0xf], word & 1);
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}
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}
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}
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/// 8xy7: Performs subtraction of vY and vX, and stores the result in vX and ~carry in vF
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#[test]
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fn backwards_sub() {
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let (mut cpu, _) = setup_environment();
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for word in 0..=0xffff {
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let (a, b) = (word as u8, (word >> 4) as u8);
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for reg in 0..=0xff {
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let (x, y) = (reg & 0xf, reg >> 4);
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// calculate the expected result
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let (expected, carry) = if x == y { a } else { b }.overflowing_sub(a);
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// set the registers under test to a, b
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(cpu.v[x], cpu.v[y]) = (a, b);
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// do the thing
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cpu.backwards_sub(x, y);
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// validate the result
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// if the destination is vF, the result was discarded, and only the carry was kept
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if x != 0xf {
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assert_eq!(cpu.v[x], expected);
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}
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// The borrow flag for subtraction is inverted
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assert_eq!(cpu.v[0xf], (!carry).into());
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}
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}
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}
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/// 8X_E: Performs bitwise left shift of vX
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// TODO: Test with authentic flag set
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#[test]
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fn shift_left() {
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let (mut cpu, _) = setup_environment();
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for word in 0..=0xff {
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for x in 0..=0xf {
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// set the register under test to `word`
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cpu.v[x] = word;
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// do the thing
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cpu.shift_left(x, x);
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// validate the result
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// if the destination is vF, the result was discarded, and only the carry was kept
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if x != 0xf {
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assert_eq!(cpu.v[x], word << 1);
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}
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// The borrow flag for subtraction is inverted
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assert_eq!(cpu.v[0xf], word >> 7);
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}
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}
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}
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}
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/// Test operations on the index/indirect register, I
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mod i {
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use super::*;
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/// Aadr: Load address #adr into register I
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#[test]
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fn load_i_immediate() {
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let (mut cpu, _) = setup_environment();
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for addr in 0..0x1000 {
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// Load indirect register
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cpu.load_i_immediate(addr);
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// Validate register set to addr
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assert_eq!(cpu.i, addr);
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}
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}
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/// Fx1e: Add vX to I
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#[test]
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fn add_i() {
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let (mut cpu, _) = setup_environment();
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// For every valid address
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for addr in 0..0x1000 {
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// For every valid offset
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for x in 0..=0xfff {
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let (x, byte) = (x >> 8, x as u8);
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// set v[x] = byte
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(cpu.i, cpu.v[x]) = (addr as u16, byte);
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// add vX to indirect register
|
|
cpu.add_i(x);
|
|
// Validate register set
|
|
assert_eq!(cpu.i, (addr + byte as usize) as u16)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/// Screen, buttons, other things that would be peripherals on a real architecture
|
|
/// # Includes:
|
|
/// - Random number generation
|
|
/// - Drawing to the display
|
|
mod io {
|
|
use std::io::Write;
|
|
|
|
use super::*;
|
|
/// Cxbb: Stores a random number & the provided byte into vX
|
|
//#[test]
|
|
#[allow(dead_code)]
|
|
fn rand() {
|
|
todo!()
|
|
}
|
|
|
|
mod display {
|
|
use super::*;
|
|
#[derive(Debug)]
|
|
struct ScreenTest {
|
|
program: &'static [u8],
|
|
screen: &'static [u8],
|
|
steps: usize,
|
|
quirks: Quirks,
|
|
}
|
|
|
|
const SCREEN_TESTS: [ScreenTest; 4] = [
|
|
// Passing BC_test
|
|
// # Quirks:
|
|
// - Requires
|
|
ScreenTest {
|
|
program: include_bytes!("../../chip-8/BC_test.ch8"),
|
|
screen: include_bytes!("tests/screens/BC_test.ch8/197.bin"),
|
|
steps: 250,
|
|
quirks: Quirks {
|
|
bin_ops: true,
|
|
shift: false,
|
|
draw_wait: true,
|
|
|
|
dma_inc: false,
|
|
stupid_jumps: false,
|
|
},
|
|
},
|
|
// The IBM Logo
|
|
ScreenTest {
|
|
program: include_bytes!("../../chip-8/IBM Logo.ch8"),
|
|
screen: include_bytes!("tests/screens/IBM Logo.ch8/20.bin"),
|
|
steps: 20,
|
|
quirks: Quirks {
|
|
bin_ops: true,
|
|
shift: true,
|
|
draw_wait: false,
|
|
|
|
dma_inc: true,
|
|
stupid_jumps: false,
|
|
},
|
|
},
|
|
// Rule 22 cellular automata
|
|
// # Quirks
|
|
// - Requires draw_wait false, or it just takes AGES.
|
|
ScreenTest {
|
|
program: include_bytes!("../../chip-8/1dcell.ch8"),
|
|
screen: include_bytes!("tests/screens/1dcell.ch8/123342.bin"),
|
|
steps: 123342,
|
|
quirks: Quirks {
|
|
bin_ops: true,
|
|
shift: true,
|
|
draw_wait: false,
|
|
|
|
dma_inc: true,
|
|
stupid_jumps: false,
|
|
},
|
|
},
|
|
// Rule 60 cellular automata
|
|
ScreenTest {
|
|
program: include_bytes!("../../chip-8/1dcell.ch8"),
|
|
screen: include_bytes!("tests/screens/1dcell.ch8/2391162.bin"),
|
|
steps: 2391162,
|
|
quirks: Quirks {
|
|
bin_ops: true,
|
|
shift: true,
|
|
draw_wait: false,
|
|
|
|
dma_inc: true,
|
|
stupid_jumps: false,
|
|
},
|
|
},
|
|
];
|
|
|
|
/// Dxyn: Draws n-byte sprite to the screen at coordinates (vX, vY)
|
|
#[test]
|
|
fn draw() {
|
|
for test in SCREEN_TESTS {
|
|
let (mut cpu, mut bus) = setup_environment();
|
|
cpu.flags.quirks = test.quirks;
|
|
// Load the test program
|
|
bus = bus.load_region(Program, test.program);
|
|
// Run the test program for the specified number of steps
|
|
while cpu.cycle() < test.steps {
|
|
cpu.multistep(&mut bus, test.steps - cpu.cycle());
|
|
}
|
|
// Compare the screen to the reference screen buffer
|
|
bus.print_screen().unwrap();
|
|
print_screen(test.screen);
|
|
assert_eq!(bus.get_region(Screen).unwrap(), test.screen);
|
|
}
|
|
}
|
|
}
|
|
|
|
mod cf {
|
|
//use super::*;
|
|
/// Ex9E: Skip next instruction if key == #X
|
|
//#[test]
|
|
#[allow(dead_code)]
|
|
fn skip_key_equals() {
|
|
todo!()
|
|
}
|
|
|
|
/// ExaE: Skip next instruction if key != #X
|
|
//#[test]
|
|
#[allow(dead_code)]
|
|
fn skip_key_not_equals() {
|
|
todo!()
|
|
}
|
|
|
|
/// Fx0A: Wait for key, then vX = K
|
|
//#[test]
|
|
#[allow(dead_code)]
|
|
fn wait_for_key() {
|
|
todo!()
|
|
}
|
|
}
|
|
|
|
/// Fx07: Get the current DT, and put it in vX
|
|
#[test]
|
|
fn get_delay_timer() {
|
|
let (mut cpu, _) = setup_environment();
|
|
for word in 0..=0xff {
|
|
for x in 0..=0xf {
|
|
// set the register under test to `word`
|
|
cpu.delay = word as f64;
|
|
// do the thing
|
|
cpu.load_delay_timer(x);
|
|
// validate the result
|
|
assert_eq!(cpu.v[x], word);
|
|
}
|
|
}
|
|
}
|
|
|
|
/// Fx15: Load vX into DT
|
|
#[test]
|
|
fn load_delay_timer() {
|
|
let (mut cpu, _) = setup_environment();
|
|
for word in 0..=0xff {
|
|
for x in 0..=0xf {
|
|
// set the register under test to `word`
|
|
cpu.v[x] = word;
|
|
// do the thing
|
|
cpu.store_delay_timer(x);
|
|
// validate the result
|
|
assert_eq!(cpu.delay, word as f64);
|
|
}
|
|
}
|
|
}
|
|
|
|
/// Fx18: Load vX into ST
|
|
#[test]
|
|
fn load_sound_timer() {
|
|
let (mut cpu, _) = setup_environment();
|
|
for word in 0..=0xff {
|
|
for x in 0..=0xf {
|
|
// set the register under test to `word`
|
|
cpu.v[x] = word;
|
|
// do the thing
|
|
cpu.store_sound_timer(x);
|
|
// validate the result
|
|
assert_eq!(cpu.sound, word as f64);
|
|
}
|
|
}
|
|
}
|
|
|
|
mod sprite {
|
|
use super::*;
|
|
|
|
struct SpriteTest {
|
|
input: u8,
|
|
output: &'static [u8],
|
|
}
|
|
|
|
#[rustfmt::skip]
|
|
const TESTS: [SpriteTest; 16] = [
|
|
SpriteTest { input: 0x0, output: &[0xf0, 0x90, 0x90, 0x90, 0xf0] },
|
|
SpriteTest { input: 0x1, output: &[0x20, 0x60, 0x20, 0x20, 0x70] },
|
|
SpriteTest { input: 0x2, output: &[0xf0, 0x10, 0xf0, 0x80, 0xf0] },
|
|
SpriteTest { input: 0x3, output: &[0xf0, 0x10, 0xf0, 0x10, 0xf0] },
|
|
SpriteTest { input: 0x4, output: &[0x90, 0x90, 0xf0, 0x10, 0x10] },
|
|
SpriteTest { input: 0x5, output: &[0xf0, 0x80, 0xf0, 0x10, 0xf0] },
|
|
SpriteTest { input: 0x6, output: &[0xf0, 0x80, 0xf0, 0x90, 0xf0] },
|
|
SpriteTest { input: 0x7, output: &[0xf0, 0x10, 0x20, 0x40, 0x40] },
|
|
SpriteTest { input: 0x8, output: &[0xf0, 0x90, 0xf0, 0x90, 0xf0] },
|
|
SpriteTest { input: 0x9, output: &[0xf0, 0x90, 0xf0, 0x10, 0xf0] },
|
|
SpriteTest { input: 0xa, output: &[0xf0, 0x90, 0xf0, 0x90, 0x90] },
|
|
SpriteTest { input: 0xb, output: &[0xe0, 0x90, 0xe0, 0x90, 0xe0] },
|
|
SpriteTest { input: 0xc, output: &[0xf0, 0x80, 0x80, 0x80, 0xf0] },
|
|
SpriteTest { input: 0xd, output: &[0xe0, 0x90, 0x90, 0x90, 0xe0] },
|
|
SpriteTest { input: 0xe, output: &[0xf0, 0x80, 0xf0, 0x80, 0xf0] },
|
|
SpriteTest { input: 0xf, output: &[0xf0, 0x80, 0xf0, 0x80, 0x80] },
|
|
];
|
|
|
|
/// Fx29: Load sprite for character vX into I
|
|
#[test]
|
|
#[allow(dead_code)]
|
|
fn load_sprite() {
|
|
let (mut cpu, bus) = setup_environment();
|
|
for test in TESTS {
|
|
let reg = 0xf & random::<usize>();
|
|
// load number into CPU register
|
|
cpu.v[reg] = test.input;
|
|
|
|
cpu.load_sprite(reg);
|
|
|
|
let addr = cpu.i as usize;
|
|
assert_eq!(
|
|
bus.get(addr..addr.wrapping_add(5)).unwrap(),
|
|
test.output,
|
|
"\nTesting load_sprite({:x}) -> {:04x} {{\n\tout:{:02x?}\n\texp:{:02x?}\n}}",
|
|
test.input,
|
|
cpu.i,
|
|
bus.get(addr..addr.wrapping_add(5)).unwrap(),
|
|
test.output,
|
|
);
|
|
}
|
|
}
|
|
}
|
|
|
|
mod bcdtest {
|
|
pub(self) use super::*;
|
|
|
|
struct BCDTest {
|
|
// value to test
|
|
input: u8,
|
|
// result
|
|
output: &'static [u8],
|
|
}
|
|
|
|
const BCD_TESTS: [BCDTest; 3] = [
|
|
BCDTest {
|
|
input: 000,
|
|
output: &[0, 0, 0],
|
|
},
|
|
BCDTest {
|
|
input: 255,
|
|
output: &[2, 5, 5],
|
|
},
|
|
BCDTest {
|
|
input: 127,
|
|
output: &[1, 2, 7],
|
|
},
|
|
];
|
|
|
|
/// Fx33: BCD convert X into I`[0..3]`
|
|
#[test]
|
|
#[allow(dead_code)]
|
|
fn bcd_convert() {
|
|
for test in BCD_TESTS {
|
|
let (mut cpu, mut bus) = setup_environment();
|
|
let addr = 0xff0 & random::<u16>() as usize;
|
|
// load CPU registers
|
|
cpu.i = addr as u16;
|
|
cpu.v[5] = test.input;
|
|
|
|
cpu.bcd_convert(5, &mut bus);
|
|
// validate the results
|
|
assert_eq!(bus.get(addr..addr.saturating_add(3)), Some(test.output))
|
|
}
|
|
}
|
|
}
|
|
|
|
/// Fx55: DMA Stor from I to registers 0..X
|
|
// TODO: Test with dma_inc quirk set
|
|
#[test]
|
|
#[allow(dead_code)]
|
|
fn dma_store() {
|
|
let (mut cpu, mut bus) = setup_environment();
|
|
const DATA: &[u8] = b"ABCDEFGHIJKLMNOP";
|
|
// Load some test data into memory
|
|
let addr = 0x456;
|
|
cpu.v.as_mut_slice().write(DATA).unwrap();
|
|
for len in 0..16 {
|
|
// Perform DMA store
|
|
cpu.i = addr as u16;
|
|
cpu.store_dma(len, &mut bus);
|
|
// Check that bus grabbed the correct data
|
|
let mut bus = bus.get_mut(addr..addr + DATA.len()).unwrap();
|
|
assert_eq!(bus[0..=len], DATA[0..=len]);
|
|
assert_eq!(bus[len + 1..], [0; 16][len + 1..]);
|
|
// clear
|
|
bus.write(&[0; 16]).unwrap();
|
|
}
|
|
}
|
|
|
|
/// Fx65: DMA Load from I to registers 0..X
|
|
// TODO: Test with dma_inc quirk set
|
|
#[test]
|
|
#[allow(dead_code)]
|
|
fn dma_load() {
|
|
let (mut cpu, mut bus) = setup_environment();
|
|
const DATA: &[u8] = b"ABCDEFGHIJKLMNOP";
|
|
// Load some test data into memory
|
|
let addr = 0x456;
|
|
bus.get_mut(addr..addr + DATA.len())
|
|
.unwrap()
|
|
.write(DATA)
|
|
.unwrap();
|
|
for len in 0..16 {
|
|
// Perform DMA load
|
|
cpu.i = addr as u16;
|
|
cpu.load_dma(len, &mut bus);
|
|
// Check that registers grabbed the correct data
|
|
assert_eq!(cpu.v[0..=len], DATA[0..=len]);
|
|
assert_eq!(cpu.v[len + 1..], [0; 16][len + 1..]);
|
|
// clear
|
|
cpu.v = [0; 16];
|
|
}
|
|
}
|
|
}
|