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  • 185712aeb6 cpu/tests.rs: Modularize and add new tests John Breaux 2023-03-26 18:33:12 -0500
  • a2a44dfd4f cpu.rs: Make private function names more concise John Breaux 2023-03-26 18:32:31 -0500
  • 5520d4ab69 io.rs: Dump memory to file (already used by main, oops!) John Breaux 2023-03-25 18:33:05 -0500
  • edd2b60665 cpu.rs: Refactor dump(&self) to do fewer allocations John Breaux 2023-03-25 18:32:45 -0500
  • 47fa41fd01 main.rs/lib.rs: Refactor to make it more funny John Breaux 2023-03-25 18:19:06 -0500
  • 5355e10218 Add utility binaries for disassembly and screenshot viewing John Breaux 2023-03-25 18:17:55 -0500
  • 73a69f3469 cpu.rs: Create unit tests for most instructions John Breaux 2023-03-25 18:17:09 -0500
  • 27ac674616 cpu.rs: Refactor instruction implementations - Use rust standard implementations of overflowing arithmetic - Make draw more concise and readable John Breaux 2023-03-25 18:14:36 -0500
  • 5159afa3fd cpu.rs: Reference chaining mutable functions John Breaux 2023-03-25 18:09:41 -0500
  • 49a6fc0377 dump.rs: Does not spark joy (remove dump.rs) John Breaux 2023-03-25 17:45:22 -0500
  • 4ab7dcbe6a main.rs: General cleanup in preparation for refactor John Breaux 2023-03-25 17:42:06 -0500
  • f3badf41e8 io.rs: QOL fixups; Reuse WindowBuilder, #[derive(...)] FrameBufferFormat John Breaux 2023-03-25 17:39:03 -0500
  • c7447a26a3 disassemble.rs: Format with rustfmt John Breaux 2023-03-25 17:37:09 -0500
  • 712acc5984 bus.rs: Improve region encoding with enums John Breaux 2023-03-25 17:20:20 -0500
  • e534041d00 gitignore: Add screen_dump.bin John Breaux 2023-03-25 16:58:05 -0500
  • dc61bd0087 I/O: KISS the bus, attach a screen, plug in a controller Chip-8 has no ROM, nor memory management. - It's much easier to just use contiguous memory. - Then we can return references to slices of that memory - ~3x speed increase Screen exists now, uses 24-bit framebuffer - We have a 1-bit framebuffer - I chose colors that look good to me Controller exists as well, has 16 buttons - Mapped "0 123 456 789 ab cdef" to (QWERTY) "X 123 QWE ASD zC 4RFV" - Other chip-8 interpreters may use a different layout - This is good enough for now. - F1-F9 map to control functions - F1, F2: Dump CPU registers/screen contents - F3, F4: Toggle disassembly/pause - F5: Single-step the CPU, pausing after - F6, F7: Set/Unset breakpoint - F8, F9: Soft/Hard Reset CPU John Breaux 2023-03-22 15:03:53 -0500
  • ef3d765651 experimentation: benchmarking and alternate impl's - Do some basic benchmarking with std::time - Try writing bus writer based on iterator - Fail, because that requires mutable iterator - Begin rewriting bus based on simpler design instead. - Simpler design uses a unified memory model, which grows based on the maximum addresses expected in it - Still uses the "infallible" Read/Write traits from previous implementation. :( Alas, it's much faster during operation, even if it takes longer to instantiate. - Reassessed the syntax for bus macro - Made CPU tick generic over bus::Read and bus::Write traits John Breaux 2023-03-17 20:06:31 -0500
  • 2ba807d7a8 Rumpulator: Change name to Chumpulator John Breaux 2023-03-10 15:33:36 -0600
  • f03d03bf4e readme.md: Add readme.md John Breaux 2023-03-10 15:33:02 -0600
  • a721a00232 Initial commit: John Breaux 2023-03-08 06:07:33 -0600