- Do some basic benchmarking with std::time
- Try writing bus writer based on iterator
- Fail, because that requires mutable iterator
- Begin rewriting bus based on simpler design instead.
- Simpler design uses a unified memory model,
which grows based on the maximum addresses expected in it
- Still uses the "infallible" Read/Write traits from previous
implementation. :( Alas, it's much faster during operation,
even if it takes longer to instantiate.
- Reassessed the syntax for bus macro
- Made CPU tick generic over bus::Read and bus::Write traits
Created outline of emulator:
The emulator has a Bus, which attaches a CPU to some Memory (Mapped Devices)
The design isn't particularly efficient, but the interpreter only needs to
run at ~500Hz or so. It's Rust. It can do that.
Instructions yet to be implemented:
Cxbb: "Store a random number, masked by bitmask bb, into vX"
Dxyn: "Draw an 8 by n sprite to the screen at coordinates (x, y)"
Fx0A: "Wait for a key, then set vX to the value of the pressed key"
Fx33: "BCD convert X, storing the results in &I[0..3]"
Thoughts going forward:
- It's probably a good idea to parse instructions out into an enum.
I had this in an earlier design, but it didn't really look that good.
However, I haven't read many other emulators before, so I don't know the
style people generally go for.
- I haven't used a native graphics library before, and my cg class was done
entirely in a web browser. That kinda sucks, honestly. Sure the skill
might transfer well, but, >JS
