diff --git a/src/bus.rs b/src/bus.rs index c8bea42..b9eb5ff 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -59,6 +59,7 @@ pub enum Region { Screen, /// Stack space Stack, + #[doc(hidden)] /// Total number of named regions Count, } @@ -293,7 +294,7 @@ impl Bus { ///# Ok(()) ///# } /// ``` - /// If there is no Screen region, it will return Err(Error::MissingRegion) + /// If there is no Screen region, it will return Err([MissingRegion]) /// ```rust,should_panic ///# use chirp::prelude::*; ///# fn main() -> Result<()> { diff --git a/src/cpu.rs b/src/cpu.rs index 0cbf1fe..85a6b75 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -61,14 +61,22 @@ impl Default for Quirks { } } +/// Represents flags that aid in operation, but aren't inherent to the CPU #[derive(Clone, Debug, Default, PartialEq, Eq, PartialOrd, Ord, Hash)] pub struct ControlFlags { + /// Set when debug (live disassembly) mode enabled pub debug: bool, + /// Set when the emulator is paused by the user and should not update pub pause: bool, + /// Set when the emulator is waiting for a keypress pub keypause: bool, + /// Set when the emulator is waiting for a frame to be drawn pub vbi_wait: bool, + /// Set to the last key that's been *released* after a keypause pub lastkey: Option, + /// Represents the set of emulator "[Quirks]" to enable pub quirks: Quirks, + /// Represents the number of instructions to run per tick of the internal timer pub monotonic: Option, } @@ -111,6 +119,8 @@ impl ControlFlags { /// Represents the internal state of the CPU interpreter #[derive(Clone, Debug, PartialEq)] pub struct CPU { + /// Flags that control how the CPU behaves, but which aren't inherent to the + /// implementation. Includes [Quirks], target IPF, etc. pub flags: ControlFlags, // memory map info screen: Adr, @@ -468,6 +478,7 @@ impl CPU { return self; }; + // Convert the elapsed time to 60ths of a second let time = self.timer.elapsed().as_secs_f64() * 60.0; self.timer = Instant::now(); if time > 1.0 { diff --git a/src/cpu/disassemble.rs b/src/cpu/disassemble.rs index ec5c336..9014b96 100644 --- a/src/cpu/disassemble.rs +++ b/src/cpu/disassemble.rs @@ -7,31 +7,38 @@ use super::{Adr, Nib, Reg}; use owo_colors::{OwoColorize, Style}; type Ins = Nib; +/// Extracts the I nibble of an IXYN instruction #[inline] pub fn i(ins: u16) -> Ins { (ins >> 12 & 0xf) as Ins } +/// Extracts the X nibble of an IXYN instruction #[inline] pub fn x(ins: u16) -> Reg { (ins >> 8 & 0xf) as Reg } +/// Extracts the Y nibble of an IXYN instruction #[inline] pub fn y(ins: u16) -> Reg { (ins >> 4 & 0xf) as Reg } +/// Extracts the N nibble of an IXYN instruction #[inline] pub fn n(ins: u16) -> Nib { (ins & 0xf) as Nib } +/// Extracts the B byte of an IXBB instruction #[inline] pub fn b(ins: u16) -> u8 { (ins & 0xff) as u8 } +/// Extracts the ADR trinibble of an IADR instruction #[inline] pub fn a(ins: u16) -> Adr { ins & 0x0fff } +/// Disassembles Chip-8 instructions, printing them in the provided [owo_colors::Style]s #[derive(Clone, Debug, PartialEq)] pub struct Disassemble { invalid: Style, @@ -46,15 +53,15 @@ impl Default for Disassemble { // Public API impl Disassemble { - // Returns a new Disassemble with the provided Styles + /// Returns a new Disassemble with the provided Styles pub fn new(invalid: Style, normal: Style) -> Disassemble { Disassemble { invalid, normal } } - // + /// Creates a [DisassembleBuilder], for partial configuration pub fn builder() -> DisassembleBuilder { DisassembleBuilder::default() } - // Disassemble a single instruction + /// Disassemble a single instruction pub fn instruction(&self, opcode: u16) -> String { let (i, x, y, n, b, a) = ( i(opcode), @@ -374,6 +381,7 @@ impl Disassemble { } } +/// Builder for [Disassemble]rs #[derive(Clone, Debug, Default, PartialEq)] pub struct DisassembleBuilder { invalid: Option