schip: Add preliminary SuperChip support (no test)
This commit is contained in:
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081dda9c8a
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justfile
11
justfile
@ -7,11 +7,14 @@ rat:
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test:
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test:
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cargo nextest run
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cargo nextest run
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chirp:
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run rom:
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cargo run --bin chirp-minifb -- chip8-test-suite/bin/chip8-test-suite.ch8
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cargo run --bin chirp-minifb -- '{{rom}}'
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debug rom:
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cargo run --bin chirp-minifb -- -d '{{rom}}'
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# Run at 2100000 instructions per frame, and output per-frame runtime statistics
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# Run at 2100000 instructions per frame, and output per-frame runtime statistics
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bench:
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bench:
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cargo run --bin chirp-minifb --release -- chip8Archive/roms/1dcell.ch8 -xP -s10 -S2100000
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cargo run --bin chirp-minifb --release -- chip8Archive/roms/1dcell.ch8 -Ps10 -S2100000 -m xochip
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flame rom:
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flame rom:
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CARGO_PROFILE_RELEASE_DEBUG=true cargo flamegraph -F 15300 --open --bin chirp-minifb -- '{{rom}}' -s10
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CARGO_PROFILE_RELEASE_DEBUG=true cargo flamegraph -F 15300 --open --bin chirp-minifb -- '{{rom}}' -s10
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@ -23,5 +26,5 @@ cover:
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cargo llvm-cov --open --doctests
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cargo llvm-cov --open --doctests
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tokei:
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tokei:
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tokei --exclude tests/chip8-test-suite
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tokei --exclude chip8-test-suite --exclude chip8Archive
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@ -36,33 +36,39 @@ struct Arguments {
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pub step: Option<usize>,
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pub step: Option<usize>,
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#[options(help = "Enable performance benchmarking on stderr (requires -S)")]
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#[options(help = "Enable performance benchmarking on stderr (requires -S)")]
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pub perf: bool,
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pub perf: bool,
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#[options(
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short = "z",
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help = "Disable setting vF to 0 after a bitwise operation."
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)]
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pub vfreset: bool,
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#[options(
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short = "x",
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help = "Disable waiting for vblank after issuing a draw call."
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)]
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pub drawsync: bool,
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#[options(
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#[options(
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short = "c",
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help = "Run in (Chip8, SChip, XOChip) mode.",
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help = "Use CHIP-48 style DMA instructions, which don't touch I."
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//parse(from_str = "parse_mode")
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)]
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)]
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pub memory: bool,
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pub mode: Option<Mode>,
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#[options(
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short = "v",
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help = "Use CHIP-48 style bit-shifts, which don't touch vY."
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)]
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pub shift: bool,
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#[options(
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short = "b",
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help = "Use SUPER-CHIP style indexed jump, which is indexed relative to v[adr]."
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)]
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pub jumping: bool,
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// #[options(
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// short = "z",
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// help = "Disable setting vF to 0 after a bitwise operation."
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// )]
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// pub vfreset: bool,
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// #[options(
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// short = "x",
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// help = "Disable waiting for vblank after issuing a draw call."
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// )]
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// pub drawsync: bool,
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// #[options(
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// short = "c",
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// help = "Use CHIP-48 style DMA instructions, which don't touch I."
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// )]
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// pub memory: bool,
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// #[options(
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// short = "v",
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// help = "Use CHIP-48 style bit-shifts, which don't touch vY."
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// )]
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// pub shift: bool,
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// #[options(
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// short = "b",
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// help = "Use SUPER-CHIP style indexed jump, which is indexed relative to v[adr]."
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// )]
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// pub jumping: bool,
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#[options(
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#[options(
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long = "break",
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long = "break",
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help = "Set breakpoints for the emulator to stop at.",
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help = "Set breakpoints for the emulator to stop at.",
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@ -105,7 +111,7 @@ impl State {
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// Load the ROM file into RAM
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// Load the ROM file into RAM
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Program [0x0200..0x1000] = &read(&options.file)?,
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Program [0x0200..0x1000] = &read(&options.file)?,
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// Create a screen
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// Create a screen
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Screen [0x1000..0x1100],
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Screen [0x1000..0x1400],
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// Create a stack
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// Create a stack
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Stack [0x0EA0..0x0F00],
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Stack [0x0EA0..0x0F00],
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},
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},
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@ -117,13 +123,7 @@ impl State {
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Dis::default(),
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Dis::default(),
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options.breakpoints,
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options.breakpoints,
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ControlFlags {
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ControlFlags {
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quirks: chirp::cpu::Quirks {
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quirks: options.mode.unwrap_or_default().into(),
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bin_ops: options.vfreset,
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shift: options.shift,
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draw_wait: options.drawsync,
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dma_inc: options.memory,
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stupid_jumps: options.jumping,
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},
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debug: options.debug,
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debug: options.debug,
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pause: options.pause,
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pause: options.pause,
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monotonic: options.speed,
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monotonic: options.speed,
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@ -131,7 +131,7 @@ impl State {
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},
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},
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),
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),
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},
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},
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ui: UIBuilder::new(64, 32, &options.file).build()?,
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ui: UIBuilder::new(128, 64, &options.file).build()?,
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ft: Instant::now(),
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ft: Instant::now(),
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};
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};
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state.ch8.bus.write(0x1feu16, options.data);
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state.ch8.bus.write(0x1feu16, options.data);
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@ -202,7 +202,7 @@ impl Iterator for State {
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}
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}
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}
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}
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fn main() -> Result<()> {
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pub fn main() -> Result<()> {
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let options = Arguments::parse_args_default_or_exit();
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let options = Arguments::parse_args_default_or_exit();
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let state = State::new(options)?;
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let state = State::new(options)?;
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for result in state {
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for result in state {
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@ -56,14 +56,14 @@ impl UIBuilder {
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impl Default for UIBuilder {
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impl Default for UIBuilder {
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fn default() -> Self {
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fn default() -> Self {
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UIBuilder {
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UIBuilder {
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width: 64,
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width: 128,
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height: 32,
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height: 64,
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name: Some("Chip-8 Interpreter"),
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name: Some("Chip-8 Interpreter"),
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rom: None,
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rom: None,
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window_options: WindowOptions {
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window_options: WindowOptions {
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title: true,
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title: true,
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resize: false,
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resize: false,
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scale: Scale::X16,
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scale: Scale::X8,
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scale_mode: ScaleMode::AspectRatioStretch,
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scale_mode: ScaleMode::AspectRatioStretch,
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none: true,
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none: true,
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..Default::default()
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..Default::default()
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@ -80,9 +80,13 @@ pub struct FrameBufferFormat {
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impl Default for FrameBufferFormat {
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impl Default for FrameBufferFormat {
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fn default() -> Self {
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fn default() -> Self {
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// FrameBufferFormat {
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// fg: 0x0011a434,
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// bg: 0x001E2431,
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// }
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FrameBufferFormat {
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FrameBufferFormat {
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fg: 0x0011a434,
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fg: 0xc4c4c4,
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bg: 0x001E2431,
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bg: 0x000000,
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}
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}
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}
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}
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}
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}
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@ -112,6 +116,8 @@ impl FrameBuffer {
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self.format.fg
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self.format.fg
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} else {
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} else {
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self.format.bg
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self.format.bg
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// .wrapping_add(0x001104 * (idx / self.width) as u32)
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// .wrapping_add(0x141000 * (idx & 3) as u32)
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}
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}
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}
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}
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}
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}
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@ -123,7 +129,7 @@ impl FrameBuffer {
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impl Default for FrameBuffer {
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impl Default for FrameBuffer {
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fn default() -> Self {
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fn default() -> Self {
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Self::new(64, 32)
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Self::new(128, 64)
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}
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}
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}
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}
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76
src/bus.rs
76
src/bus.rs
@ -308,14 +308,14 @@ impl Bus {
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const REGION: Region = Region::Screen;
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const REGION: Region = Region::Screen;
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if let Some(screen) = self.get_region(REGION) {
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if let Some(screen) = self.get_region(REGION) {
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for (index, byte) in screen.iter().enumerate() {
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for (index, byte) in screen.iter().enumerate() {
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if index % 8 == 0 {
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if index % 16 == 0 {
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print!("|");
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print!("{index:03x}|");
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}
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}
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print!(
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print!(
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"{}",
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"{}",
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format!("{byte:08b}").replace('0', " ").replace('1', "██")
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format!("{byte:08b}").replace('0', " ").replace('1', "█")
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);
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);
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if index % 8 == 7 {
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if index % 16 == 15 {
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println!("|");
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println!("|");
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}
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}
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}
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}
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@ -339,7 +339,43 @@ impl Read<u16> for Bus {
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fn read(&self, addr: impl Into<usize>) -> u16 {
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fn read(&self, addr: impl Into<usize>) -> u16 {
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let addr: usize = addr.into();
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let addr: usize = addr.into();
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if let Some(bytes) = self.memory.get(addr..addr + 2) {
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if let Some(bytes) = self.memory.get(addr..addr + 2) {
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u16::from_be_bytes(bytes.try_into().expect("asked for 2 bytes, got != 2 bytes"))
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u16::from_be_bytes(bytes.try_into().expect("Should get 2 bytes"))
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} else {
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0xc5c5
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}
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}
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}
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impl Read<u32> for Bus {
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/// Read a u16 from address `addr`
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fn read(&self, addr: impl Into<usize>) -> u32 {
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let addr: usize = addr.into();
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if let Some(bytes) = self.memory.get(addr..addr + 4) {
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u32::from_be_bytes(bytes.try_into().expect("Should get 4 bytes"))
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} else {
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0xc5c5
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}
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}
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}
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impl Read<u64> for Bus {
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/// Read a u16 from address `addr`
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fn read(&self, addr: impl Into<usize>) -> u64 {
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let addr: usize = addr.into();
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if let Some(bytes) = self.memory.get(addr..addr + 8) {
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u64::from_be_bytes(bytes.try_into().expect("Should get 8 bytes"))
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} else {
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0xc5c5
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}
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}
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}
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impl Read<u128> for Bus {
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/// Read a u16 from address `addr`
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fn read(&self, addr: impl Into<usize>) -> u128 {
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let addr: usize = addr.into();
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if let Some(bytes) = self.memory.get(addr..addr + 16) {
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u128::from_be_bytes(bytes.try_into().expect("Should get 16 bytes"))
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} else {
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} else {
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0xc5c5
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0xc5c5
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}
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}
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@ -366,6 +402,36 @@ impl Write<u16> for Bus {
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}
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}
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}
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}
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impl Write<u32> for Bus {
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/// Write a u16 to address `addr`
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fn write(&mut self, addr: impl Into<usize>, data: u32) {
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let addr: usize = addr.into();
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if let Some(slice) = self.get_mut(addr..addr + 4) {
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data.to_be_bytes().as_mut().swap_with_slice(slice);
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}
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}
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}
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impl Write<u64> for Bus {
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/// Write a u16 to address `addr`
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fn write(&mut self, addr: impl Into<usize>, data: u64) {
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let addr: usize = addr.into();
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if let Some(slice) = self.get_mut(addr..addr + 8) {
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data.to_be_bytes().as_mut().swap_with_slice(slice);
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}
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}
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}
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impl Write<u128> for Bus {
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/// Write a u16 to address `addr`
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fn write(&mut self, addr: impl Into<usize>, data: u128) {
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let addr: usize = addr.into();
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if let Some(slice) = self.get_mut(addr..addr + 16) {
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data.to_be_bytes().as_mut().swap_with_slice(slice);
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}
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}
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}
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#[cfg(target_feature = "rhexdump")]
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#[cfg(target_feature = "rhexdump")]
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impl Display for Bus {
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impl Display for Bus {
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fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
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fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
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235
src/cpu.rs
235
src/cpu.rs
@ -22,12 +22,39 @@ use crate::{
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use imperative_rs::InstructionSet;
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use imperative_rs::InstructionSet;
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use owo_colors::OwoColorize;
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use owo_colors::OwoColorize;
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use rand::random;
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use rand::random;
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use std::time::Instant;
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use std::{str::FromStr, time::Instant};
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type Reg = usize;
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type Reg = usize;
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type Adr = u16;
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type Adr = u16;
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type Nib = u8;
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type Nib = u8;
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/// Selects the memory behavior of the interpreter
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#[derive(Clone, Debug, Default, PartialEq, Eq, PartialOrd, Ord, Hash)]
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pub enum Mode {
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/// VIP emulation mode
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#[default]
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Chip8,
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/// Chip-48 emulation mode
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SChip,
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/// XO-Chip emulation mode
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XOChip,
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}
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impl FromStr for Mode {
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type Err = Error;
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fn from_str(s: &str) -> std::result::Result<Self, Self::Err> {
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match s.to_lowercase().as_str() {
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"chip8" | "chip-8" => Ok(Mode::Chip8),
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"schip" | "superchip" => Ok(Mode::SChip),
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"xo-chip" | "xochip" => Ok(Mode::XOChip),
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_ => Err(Error::InvalidMode {
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mode: s.to_string(),
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}),
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}
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}
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}
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/// Controls the authenticity behavior of the CPU on a granular level.
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/// Controls the authenticity behavior of the CPU on a granular level.
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#[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)]
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#[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)]
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pub struct Quirks {
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pub struct Quirks {
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@ -51,7 +78,7 @@ impl From<bool> for Quirks {
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shift: true,
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shift: true,
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draw_wait: true,
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draw_wait: true,
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dma_inc: true,
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dma_inc: true,
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stupid_jumps: false,
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stupid_jumps: true,
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}
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}
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} else {
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} else {
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Quirks {
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Quirks {
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@ -65,6 +92,22 @@ impl From<bool> for Quirks {
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}
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}
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}
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}
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impl From<Mode> for Quirks {
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fn from(value: Mode) -> Self {
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match value {
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Mode::Chip8 => false.into(),
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Mode::SChip => true.into(),
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Mode::XOChip => Self {
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bin_ops: true,
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shift: false,
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draw_wait: true,
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dma_inc: false,
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stupid_jumps: false,
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},
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}
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}
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}
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impl Default for Quirks {
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impl Default for Quirks {
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fn default() -> Self {
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fn default() -> Self {
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Self::from(false)
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Self::from(false)
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@ -82,9 +125,13 @@ pub struct ControlFlags {
|
|||||||
pub keypause: bool,
|
pub keypause: bool,
|
||||||
/// Set when the emulator is waiting for a frame to be drawn
|
/// Set when the emulator is waiting for a frame to be drawn
|
||||||
pub draw_wait: bool,
|
pub draw_wait: bool,
|
||||||
|
/// Set when the emulator is in high-res mode
|
||||||
|
pub draw_mode: bool,
|
||||||
/// Set to the last key that's been *released* after a keypause
|
/// Set to the last key that's been *released* after a keypause
|
||||||
pub lastkey: Option<usize>,
|
pub lastkey: Option<usize>,
|
||||||
/// Represents the set of emulator [Quirks] to enable
|
/// Represents the current emulator [Mode]
|
||||||
|
pub mode: Mode,
|
||||||
|
/// Represents the set of emulator [Quirks] to enable, independent of the [Mode]
|
||||||
pub quirks: Quirks,
|
pub quirks: Quirks,
|
||||||
/// Represents the number of instructions to run per tick of the internal timer
|
/// Represents the number of instructions to run per tick of the internal timer
|
||||||
pub monotonic: Option<usize>,
|
pub monotonic: Option<usize>,
|
||||||
@ -704,6 +751,7 @@ impl CPU {
|
|||||||
#[rustfmt::skip]
|
#[rustfmt::skip]
|
||||||
fn execute(&mut self, bus: &mut Bus, instruction: Insn) {
|
fn execute(&mut self, bus: &mut Bus, instruction: Insn) {
|
||||||
match instruction {
|
match instruction {
|
||||||
|
// Core Chip-8 instructions
|
||||||
Insn::cls => self.clear_screen(bus),
|
Insn::cls => self.clear_screen(bus),
|
||||||
Insn::ret => self.ret(bus),
|
Insn::ret => self.ret(bus),
|
||||||
Insn::jmp { A } => self.jump(A),
|
Insn::jmp { A } => self.jump(A),
|
||||||
@ -713,7 +761,7 @@ impl CPU {
|
|||||||
Insn::se { y, x } => self.skip_equals(x, y),
|
Insn::se { y, x } => self.skip_equals(x, y),
|
||||||
Insn::movb { B, x } => self.load_immediate(x, B),
|
Insn::movb { B, x } => self.load_immediate(x, B),
|
||||||
Insn::addb { B, x } => self.add_immediate(x, B),
|
Insn::addb { B, x } => self.add_immediate(x, B),
|
||||||
Insn::mov { x, y } => self.load(x, y),
|
Insn::mov { y, x } => self.load(x, y),
|
||||||
Insn::or { y, x } => self.or(x, y),
|
Insn::or { y, x } => self.or(x, y),
|
||||||
Insn::and { y, x } => self.and(x, y),
|
Insn::and { y, x } => self.and(x, y),
|
||||||
Insn::xor { y, x } => self.xor(x, y),
|
Insn::xor { y, x } => self.xor(x, y),
|
||||||
@ -726,7 +774,7 @@ impl CPU {
|
|||||||
Insn::movI { A } => self.load_i_immediate(A),
|
Insn::movI { A } => self.load_i_immediate(A),
|
||||||
Insn::jmpr { A } => self.jump_indexed(A),
|
Insn::jmpr { A } => self.jump_indexed(A),
|
||||||
Insn::rand { B, x } => self.rand(x, B),
|
Insn::rand { B, x } => self.rand(x, B),
|
||||||
Insn::draw { x, y, n } => self.draw(x, y, n, bus),
|
Insn::draw { y, x, n } => self.draw(x, y, n, bus),
|
||||||
Insn::sek { x } => self.skip_key_equals(x),
|
Insn::sek { x } => self.skip_key_equals(x),
|
||||||
Insn::snek { x } => self.skip_key_not_equals(x),
|
Insn::snek { x } => self.skip_key_not_equals(x),
|
||||||
Insn::getdt { x } => self.load_delay_timer(x),
|
Insn::getdt { x } => self.load_delay_timer(x),
|
||||||
@ -738,6 +786,16 @@ impl CPU {
|
|||||||
Insn::bcd { x } => self.bcd_convert(x, bus),
|
Insn::bcd { x } => self.bcd_convert(x, bus),
|
||||||
Insn::dmao { x } => self.store_dma(x, bus),
|
Insn::dmao { x } => self.store_dma(x, bus),
|
||||||
Insn::dmai { x } => self.load_dma(x, bus),
|
Insn::dmai { x } => self.load_dma(x, bus),
|
||||||
|
// Super-Chip extensions
|
||||||
|
Insn::scd { n } => self.scroll_down(n, bus),
|
||||||
|
Insn::scr => self.scr(bus),
|
||||||
|
Insn::scl => self.scl(bus),
|
||||||
|
Insn::halt => self.flags.pause(),
|
||||||
|
Insn::lores => self.flags.draw_mode = false,
|
||||||
|
Insn::hires => self.flags.draw_mode = true,
|
||||||
|
Insn::hfont { x } => self.load_big_sprite(x),
|
||||||
|
Insn::flgo { x } => self.store_flags(x, bus),
|
||||||
|
Insn::flgi { x } => self.load_flags(x, bus),
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -755,9 +813,7 @@ impl CPU {
|
|||||||
/// |`00e0`| Clears the screen memory to 0
|
/// |`00e0`| Clears the screen memory to 0
|
||||||
#[inline(always)]
|
#[inline(always)]
|
||||||
fn clear_screen(&mut self, bus: &mut Bus) {
|
fn clear_screen(&mut self, bus: &mut Bus) {
|
||||||
if let Some(screen) = bus.get_region_mut(Region::Screen) {
|
bus.clear_region(Region::Screen);
|
||||||
screen.fill(0);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
/// |`00ee`| Returns from subroutine
|
/// |`00ee`| Returns from subroutine
|
||||||
#[inline(always)]
|
#[inline(always)]
|
||||||
@ -765,6 +821,37 @@ impl CPU {
|
|||||||
self.sp = self.sp.wrapping_add(2);
|
self.sp = self.sp.wrapping_add(2);
|
||||||
self.pc = bus.read(self.sp);
|
self.pc = bus.read(self.sp);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// |`00cN`| Scroll the screen down N lines
|
||||||
|
#[inline(always)]
|
||||||
|
fn scroll_down(&mut self, n: Nib, bus: &mut Bus) {
|
||||||
|
// Get a line from the bus
|
||||||
|
for i in (16 * n as usize..16 * 15).step_by(16).rev() {
|
||||||
|
let i = i + self.screen as usize;
|
||||||
|
let line: u128 = bus.read(i);
|
||||||
|
bus.write(i - (n as usize * 16), line);
|
||||||
|
bus.write(i, 0u128);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/// |`00fb`| Scroll the screen right
|
||||||
|
#[inline(always)]
|
||||||
|
fn scr(&mut self, bus: &mut (impl Read<u128> + Write<u128>)) {
|
||||||
|
// Get a line from the bus
|
||||||
|
for i in (0..16 * 64).step_by(16) {
|
||||||
|
//let line: u128 = bus.read(self.screen + i) >> 4;
|
||||||
|
bus.write(self.screen + i, bus.read(self.screen + i) >> 4);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/// |`00fc`| Scroll the screen right
|
||||||
|
#[inline(always)]
|
||||||
|
fn scl(&mut self, bus: &mut (impl Read<u128> + Write<u128>)) {
|
||||||
|
// Get a line from the bus
|
||||||
|
for i in (0..16 * 64).step_by(16) {
|
||||||
|
let line: u128 = (bus.read(self.screen + i) & !(0xf << 124)) << 4;
|
||||||
|
bus.write(self.screen + i, line);
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// |`1aaa`| Sets pc to an absolute address
|
// |`1aaa`| Sets pc to an absolute address
|
||||||
@ -994,6 +1081,15 @@ impl CPU {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// TODO: Do this more idiomatically, using some iterator chain?
|
||||||
|
fn doublewide(value: u16) -> u32 {
|
||||||
|
let mut out: u32 = 0;
|
||||||
|
for i in 0..16 {
|
||||||
|
out |= ((value as u32 & 0x1 << i) * 3) << i;
|
||||||
|
}
|
||||||
|
out
|
||||||
|
}
|
||||||
|
|
||||||
// |`Dxyn`| Draws n-byte sprite to the screen at coordinates (vX, vY)
|
// |`Dxyn`| Draws n-byte sprite to the screen at coordinates (vX, vY)
|
||||||
impl CPU {
|
impl CPU {
|
||||||
/// |`Dxyn`| Draws n-byte sprite to the screen at coordinates (vX, vY)
|
/// |`Dxyn`| Draws n-byte sprite to the screen at coordinates (vX, vY)
|
||||||
@ -1002,31 +1098,86 @@ impl CPU {
|
|||||||
/// On the original chip-8 interpreter, this will wait for a VBI
|
/// On the original chip-8 interpreter, this will wait for a VBI
|
||||||
#[inline(always)]
|
#[inline(always)]
|
||||||
fn draw(&mut self, x: Reg, y: Reg, n: Nib, bus: &mut Bus) {
|
fn draw(&mut self, x: Reg, y: Reg, n: Nib, bus: &mut Bus) {
|
||||||
let (x, y) = (self.v[x] as u16 % 64, self.v[y] as u16 % 32);
|
// lmaotch
|
||||||
|
match self.flags.draw_mode {
|
||||||
|
true => self.draw_hires(x, y, n, bus),
|
||||||
|
false => self.draw_lores(x, y, n, bus),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#[inline(always)]
|
||||||
|
fn draw_lores(&mut self, x: Reg, y: Reg, n: Nib, bus: &mut Bus) {
|
||||||
if !self.flags.quirks.draw_wait {
|
if !self.flags.quirks.draw_wait {
|
||||||
self.flags.draw_wait = true;
|
self.flags.draw_wait = true;
|
||||||
}
|
}
|
||||||
|
let (w, h) = (64, 32);
|
||||||
|
let (x, y) = (self.v[x] as u16 % w, self.v[y] as u16 % h);
|
||||||
self.v[0xf] = 0;
|
self.v[0xf] = 0;
|
||||||
for byte in 0..n as u16 {
|
if let Some(sprite) = bus.get(self.i as usize..(self.i + n as u16) as usize) {
|
||||||
if y + byte > 32 {
|
let sprite = sprite.to_vec();
|
||||||
return;
|
for (line, sprite) in sprite.iter().enumerate() {
|
||||||
|
let (line, sprite) = (line as u16, *sprite);
|
||||||
|
// clip
|
||||||
|
if y + line >= h {
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
// clip
|
||||||
|
let sprite = (sprite as u16) << (8 - (x % 8))
|
||||||
|
& if (x % w) >= (w - 8) { 0xff00 } else { 0xffff };
|
||||||
|
// scale
|
||||||
|
let addr = |x, y| -> u16 { ((y + (2 * line)) * 8 + (x / 8)) * 2 + self.screen };
|
||||||
|
let y = y << 1;
|
||||||
|
let sprite = doublewide(sprite);
|
||||||
|
for scale in 0..2 {
|
||||||
|
let screen: u32 = bus.read(addr(x, y + scale));
|
||||||
|
bus.write(addr(x, y + scale), screen ^ sprite);
|
||||||
|
if screen & sprite != 0 {
|
||||||
|
self.v[0xf] = 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
// Calculate the lower bound address based on the X,Y position on the screen
|
}
|
||||||
let addr = (y + byte) * 8 + (x & 0x3f) / 8 + self.screen;
|
}
|
||||||
// Read a byte of sprite data into a u16, and shift it x % 8 bits
|
// Super-Chip extension high-resolution graphics mode
|
||||||
let sprite: u8 = bus.read(self.i + byte);
|
#[inline(always)]
|
||||||
let sprite =
|
fn draw_hires(&mut self, x: Reg, y: Reg, n: Nib, bus: &mut Bus) {
|
||||||
(sprite as u16) << (8 - (x & 7)) & if x % 64 > 56 { 0xff00 } else { 0xffff };
|
if !self.flags.quirks.draw_wait {
|
||||||
// Read a u16 from the bus containing the two bytes which might need to be updated
|
self.flags.draw_wait = true;
|
||||||
let mut screen: u16 = bus.read(addr);
|
}
|
||||||
// Save the bits-toggled-off flag if necessary
|
let (w, h) = (128, 64);
|
||||||
if screen & sprite != 0 {
|
let (x, y) = (self.v[x] as u16 % w, self.v[y] as u16 % h);
|
||||||
self.v[0xF] = 1
|
let w_bytes = w / 8;
|
||||||
|
self.v[0xf] = 0;
|
||||||
|
if n == 0 {
|
||||||
|
if let Some(sprite) = bus.get(self.i as usize..(self.i + 32) as usize) {
|
||||||
|
let sprite = sprite.to_owned();
|
||||||
|
for (line, sprite) in sprite.chunks(2).enumerate() {
|
||||||
|
let sprite = u16::from_be_bytes(
|
||||||
|
sprite
|
||||||
|
.try_into()
|
||||||
|
.expect("Chunks should only return 2 bytes"),
|
||||||
|
);
|
||||||
|
let addr = (y + line as u16) * w_bytes + x / 8 + self.screen;
|
||||||
|
let sprite = (sprite as u32) << (16 - (x % 8));
|
||||||
|
let screen: u32 = bus.read(addr);
|
||||||
|
bus.write(addr, screen ^ sprite);
|
||||||
|
if screen & sprite != 0 {
|
||||||
|
self.v[0xf] += 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
if let Some(sprite) = bus.get(self.i as usize..(self.i + n as u16) as usize) {
|
||||||
|
let sprite = sprite.to_vec();
|
||||||
|
for (line, sprite) in sprite.iter().enumerate() {
|
||||||
|
let addr = (y + line as u16) * w_bytes + x / 8 + self.screen;
|
||||||
|
let sprite = (*sprite as u16) << (8 - (x % 8));
|
||||||
|
let screen: u16 = bus.read(addr);
|
||||||
|
bus.write(addr, screen ^ sprite);
|
||||||
|
if screen & sprite != 0 {
|
||||||
|
self.v[0xf] += 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
// Update the screen word by XORing the sprite byte
|
|
||||||
screen ^= sprite;
|
|
||||||
// Save the result to the screen
|
|
||||||
bus.write(addr, screen);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -1164,4 +1315,34 @@ impl CPU {
|
|||||||
self.i += x as Adr + 1;
|
self.i += x as Adr + 1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// |`Fx30`| (Super-Chip) 16x16 equivalent of Fx29
|
||||||
|
#[inline(always)]
|
||||||
|
fn load_big_sprite(&mut self, x: Reg) {
|
||||||
|
self.i = self.font + (5 * 8) + (16 * (self.v[x] as Adr % 0x10));
|
||||||
|
}
|
||||||
|
|
||||||
|
/// |`Fx75`| (Super-Chip) Save to "flag registers"
|
||||||
|
/// I just chuck it in 0x0..0xf. Screw it.
|
||||||
|
#[inline(always)]
|
||||||
|
fn store_flags(&mut self, x: Reg, bus: &mut Bus) {
|
||||||
|
// TODO: Save these, maybe
|
||||||
|
for (reg, value) in bus
|
||||||
|
.get_mut(0..=x)
|
||||||
|
.unwrap_or_default()
|
||||||
|
.iter_mut()
|
||||||
|
.enumerate()
|
||||||
|
{
|
||||||
|
*value = self.v[reg]
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/// |`Fx85`| (Super-Chip) Load from "flag registers"
|
||||||
|
/// I just chuck it in 0x0..0xf. Screw it.
|
||||||
|
#[inline(always)]
|
||||||
|
fn load_flags(&mut self, x: Reg, bus: &mut Bus) {
|
||||||
|
for (reg, value) in bus.get(0..=x).unwrap_or_default().iter().enumerate() {
|
||||||
|
self.v[reg] = *value;
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
@ -9,6 +9,7 @@ use std::fmt::Display;
|
|||||||
#[derive(Clone, Copy, Debug, InstructionSet, PartialEq, Eq)]
|
#[derive(Clone, Copy, Debug, InstructionSet, PartialEq, Eq)]
|
||||||
/// Implements a Disassembler using imperative_rs
|
/// Implements a Disassembler using imperative_rs
|
||||||
pub enum Insn {
|
pub enum Insn {
|
||||||
|
// Base instruction set
|
||||||
/// | 00e0 | Clear screen memory to 0s
|
/// | 00e0 | Clear screen memory to 0s
|
||||||
#[opcode = "0x00e0"]
|
#[opcode = "0x00e0"]
|
||||||
cls,
|
cls,
|
||||||
@ -111,12 +112,42 @@ pub enum Insn {
|
|||||||
// | fX65 | DMA Load from I to registers 0..X
|
// | fX65 | DMA Load from I to registers 0..X
|
||||||
#[opcode = "0xfx65"]
|
#[opcode = "0xfx65"]
|
||||||
dmai { x: usize },
|
dmai { x: usize },
|
||||||
|
|
||||||
|
// Super Chip extensions
|
||||||
|
/// | 00cN | Scroll the screen down
|
||||||
|
#[opcode = "0x00cn"]
|
||||||
|
scd { n: u8 },
|
||||||
|
/// | 00fb | Scroll the screen right
|
||||||
|
#[opcode = "0x00fb"]
|
||||||
|
scr,
|
||||||
|
/// | 00fc | Scroll the screen left
|
||||||
|
#[opcode = "0x00fc"]
|
||||||
|
scl,
|
||||||
|
/// | 00fd | Exit (halt and catch fire)
|
||||||
|
#[opcode = "0x00fd"]
|
||||||
|
halt,
|
||||||
|
/// | 00fe | Return to low-resolution mode
|
||||||
|
#[opcode = "0x00fe"]
|
||||||
|
lores,
|
||||||
|
/// | 00ff | Enter high-resolution mode
|
||||||
|
#[opcode = "0x00ff"]
|
||||||
|
hires,
|
||||||
|
/// | fx30 | Enter high-resolution mode
|
||||||
|
#[opcode = "0xfx30"]
|
||||||
|
hfont { x: usize },
|
||||||
|
/// | fx75 | Save to "flag registers"
|
||||||
|
#[opcode = "0xfx75"]
|
||||||
|
flgo { x: usize },
|
||||||
|
/// | fx85 | Load from "flag registers"
|
||||||
|
#[opcode = "0xfx85"]
|
||||||
|
flgi { x: usize },
|
||||||
}
|
}
|
||||||
|
|
||||||
impl Display for Insn {
|
impl Display for Insn {
|
||||||
#[rustfmt::skip]
|
#[rustfmt::skip]
|
||||||
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
|
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
|
||||||
match self {
|
match self {
|
||||||
|
// Base instruction set
|
||||||
Insn::cls => write!(f, "cls "),
|
Insn::cls => write!(f, "cls "),
|
||||||
Insn::ret => write!(f, "ret "),
|
Insn::ret => write!(f, "ret "),
|
||||||
Insn::jmp { A } => write!(f, "jmp {A:03x}"),
|
Insn::jmp { A } => write!(f, "jmp {A:03x}"),
|
||||||
@ -151,6 +182,16 @@ impl Display for Insn {
|
|||||||
Insn::bcd { x } => write!(f, "bcd v{x:X}, &I"),
|
Insn::bcd { x } => write!(f, "bcd v{x:X}, &I"),
|
||||||
Insn::dmao { x } => write!(f, "dmao v{x:X}"),
|
Insn::dmao { x } => write!(f, "dmao v{x:X}"),
|
||||||
Insn::dmai { x } => write!(f, "dmai v{x:X}"),
|
Insn::dmai { x } => write!(f, "dmai v{x:X}"),
|
||||||
|
// Super Chip extensions
|
||||||
|
Insn::scd { n } => write!(f, "scd #{n:x}"),
|
||||||
|
Insn::scr => write!(f, "scr "),
|
||||||
|
Insn::scl => write!(f, "scl "),
|
||||||
|
Insn::halt => write!(f, "halt "),
|
||||||
|
Insn::lores => write!(f, "lores "),
|
||||||
|
Insn::hires => write!(f, "hires "),
|
||||||
|
Insn::hfont { x } => write!(f, "hfont v{x:X}"),
|
||||||
|
Insn::flgo { x } => write!(f, "flgo v{x:X}"),
|
||||||
|
Insn::flgi { x } => write!(f, "flgi v{x:X}"),
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -52,6 +52,12 @@ pub enum Error {
|
|||||||
/// The offending register
|
/// The offending register
|
||||||
reg: usize,
|
reg: usize,
|
||||||
},
|
},
|
||||||
|
/// Tried to convert string into mode, but it did not match.
|
||||||
|
#[error("Invalid mode: {mode}")]
|
||||||
|
InvalidMode {
|
||||||
|
/// The string which failed to become a mode
|
||||||
|
mode: String,
|
||||||
|
},
|
||||||
/// Error originated in [std::io]
|
/// Error originated in [std::io]
|
||||||
#[error(transparent)]
|
#[error(transparent)]
|
||||||
IoError(#[from] std::io::Error),
|
IoError(#[from] std::io::Error),
|
||||||
|
@ -14,7 +14,7 @@ pub mod error;
|
|||||||
|
|
||||||
// Common imports for Chirp
|
// Common imports for Chirp
|
||||||
pub use bus::{Bus, Read, Region::*, Write};
|
pub use bus::{Bus, Read, Region::*, Write};
|
||||||
pub use cpu::{disassembler::Dis, ControlFlags, CPU};
|
pub use cpu::{disassembler::Dis, ControlFlags, Mode, CPU};
|
||||||
pub use error::Result;
|
pub use error::Result;
|
||||||
|
|
||||||
/// Holds the state of a Chip-8
|
/// Holds the state of a Chip-8
|
||||||
|
@ -17,7 +17,7 @@ fn setup_environment() -> (CPU, Bus) {
|
|||||||
Charset [0x0050..0x00A0] = include_bytes!("../src/mem/charset.bin"),
|
Charset [0x0050..0x00A0] = include_bytes!("../src/mem/charset.bin"),
|
||||||
// Load the ROM file into RAM
|
// Load the ROM file into RAM
|
||||||
Program [0x0200..0x1000] = include_bytes!("../chip8-test-suite/bin/chip8-test-suite.ch8"),
|
Program [0x0200..0x1000] = include_bytes!("../chip8-test-suite/bin/chip8-test-suite.ch8"),
|
||||||
// Create a screen, and fill it with garbage data
|
// Create a screen, and fill it with
|
||||||
Screen [0x0F00..0x1000] = include_bytes!("chip8_test_suite.rs"),
|
Screen [0x0F00..0x1000] = include_bytes!("chip8_test_suite.rs"),
|
||||||
},
|
},
|
||||||
)
|
)
|
||||||
|
@ -132,8 +132,8 @@ mod cpu {
|
|||||||
keypause: false,
|
keypause: false,
|
||||||
draw_wait: false,
|
draw_wait: false,
|
||||||
lastkey: None,
|
lastkey: None,
|
||||||
quirks: Default::default(),
|
|
||||||
monotonic: None,
|
monotonic: None,
|
||||||
|
..Default::default()
|
||||||
};
|
};
|
||||||
let cf2 = cf1.clone();
|
let cf2 = cf1.clone();
|
||||||
assert_eq!(cf1, cf2)
|
assert_eq!(cf1, cf2)
|
||||||
@ -151,9 +151,7 @@ mod cpu {
|
|||||||
pause: false,
|
pause: false,
|
||||||
keypause: false,
|
keypause: false,
|
||||||
draw_wait: false,
|
draw_wait: false,
|
||||||
lastkey: Default::default(),
|
..Default::default()
|
||||||
quirks: Default::default(),
|
|
||||||
monotonic: Default::default()
|
|
||||||
}
|
}
|
||||||
)
|
)
|
||||||
}
|
}
|
||||||
@ -165,9 +163,7 @@ mod cpu {
|
|||||||
pause: true,
|
pause: true,
|
||||||
keypause: true,
|
keypause: true,
|
||||||
draw_wait: true,
|
draw_wait: true,
|
||||||
lastkey: Default::default(),
|
..Default::default()
|
||||||
quirks: Default::default(),
|
|
||||||
monotonic: Default::default(),
|
|
||||||
};
|
};
|
||||||
assert_ne!(cf1, cf2);
|
assert_ne!(cf1, cf2);
|
||||||
}
|
}
|
||||||
@ -179,9 +175,7 @@ mod cpu {
|
|||||||
pause: true,
|
pause: true,
|
||||||
keypause: true,
|
keypause: true,
|
||||||
draw_wait: true,
|
draw_wait: true,
|
||||||
lastkey: Default::default(),
|
..Default::default()
|
||||||
quirks: Default::default(),
|
|
||||||
monotonic: Default::default(),
|
|
||||||
};
|
};
|
||||||
assert!(cf1 < cf2);
|
assert!(cf1 < cf2);
|
||||||
assert_eq!(ControlFlags::default(), cf1.min(cf2));
|
assert_eq!(ControlFlags::default(), cf1.min(cf2));
|
||||||
|
Loading…
Reference in New Issue
Block a user