Update copyright notices

src/cpu/bus.rs

@@ -1,5 +1,5 @@
 // (c) 2023 John A. Breaux
-// This code is licensed under MIT license (see LICENSE.txt for details)
+// This code is licensed under MIT license (see LICENSE for details)
 
 //! The Bus connects the CPU to Memory
 //!

src/cpu/bus/read.rs

@@ -1,5 +1,5 @@
 // (c) 2023 John A. Breaux
-// This code is licensed under MIT license (see LICENSE.txt for details)
+// This code is licensed under MIT license (see LICENSE for details)
 
 //! Trait for getting a generic integer for a structure.
 

src/cpu/flags.rs

@@ -1,9 +1,13 @@
+// (c) 2023 John A. Breaux
+// This code is licensed under MIT license (see LICENSE for details)
+
 //! Represents [Flags] that aid in implementation but aren't a part of the Chip-8 spec
 
 use super::{Mode, Quirks};
 
 /// Represents flags that aid in implementation but aren't a part of the Chip-8 spec
 #[derive(Clone, Debug, Default, PartialEq, Eq, PartialOrd, Ord, Hash)]
+#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
 pub struct Flags {
     /// Set when debug (live disassembly) mode enabled
     pub debug: bool,

src/cpu/mode.rs

@@ -1,3 +1,6 @@
+// (c) 2023 John A. Breaux
+// This code is licensed under MIT license (see LICENSE for details)
+
 //! Selects the memory behavior of the [super::CPU]
 //!
 //! Since [Quirks] implements [`From<Mode>`],
@@ -8,7 +11,8 @@ use crate::error::Error;
 use std::str::FromStr;
 
 /// Selects the memory behavior of the interpreter
-#[derive(Clone, Debug, Default, PartialEq, Eq, PartialOrd, Ord, Hash)]
+#[derive(Clone, Copy, Debug, Default, PartialEq, Eq, PartialOrd, Ord, Hash)]
+#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
 pub enum Mode {
     /// VIP emulation mode
     #[default]

src/cpu/quirks.rs

@@ -1,9 +1,13 @@
+// (c) 2023 John A. Breaux
+// This code is licensed under MIT license (see LICENSE for details)
+
 //! Controls the [Quirks] behavior of the CPU on a granular level.
 
 /// Controls the quirk behavior of the CPU on a granular level.
 ///
 /// `false` is Cosmac-VIP-like behavior
 #[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)]
+#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
 pub struct Quirks {
     /// Super Chip: Binary ops in `8xy`(`1`, `2`, `3`) shouldn't set vF to 0
     pub bin_ops: bool,

src/cpu/tests.rs

@@ -1,5 +1,5 @@
 // (c) 2023 John A. Breaux
-// This code is licensed under MIT license (see LICENSE.txt for details)
+// This code is licensed under MIT license (see LICENSE for details)
 
 //! Unit tests for [super::CPU]
 //!