cpu: fix renaming mistake "screen" -> "mem"

src/cpu/behavior.rs

@@ -407,10 +407,7 @@ impl CPU {
     pub(super) fn draw_sprite(&mut self, x: u16, y: u16, n: Nib, w: u16, h: u16, screen: &mut Bus) {
         let w_bytes = w / 8;
         self.v[0xf] = 0;
-        if let Some(sprite) = self
-            .screen
-            .get(self.i as usize..(self.i + n as u16) as usize)
-        {
+        if let Some(sprite) = self.mem.get(self.i as usize..(self.i + n as u16) as usize) {
             for (line, &sprite) in sprite.iter().enumerate() {
                 let line = line as u16;
                 let sprite = ((sprite as u16) << (8 - (x % 8))).to_be_bytes();
@@ -460,7 +457,7 @@ impl CPU {
     pub(super) fn draw_schip_sprite(&mut self, x: u16, y: u16, w: u16, screen: &mut Bus) {
         self.v[0xf] = 0;
         let w_bytes = w / 8;
-        if let Some(sprite) = self.screen.get(self.i as usize..(self.i + 32) as usize) {
+        if let Some(sprite) = self.mem.get(self.i as usize..(self.i + 32) as usize) {
             let sprite = sprite.to_owned();
             for (line, sprite) in sprite.chunks_exact(2).enumerate() {
                 let sprite = u16::from_be_bytes(
@@ -572,9 +569,9 @@ impl CPU {
     #[inline(always)]
     pub(super) fn bcd_convert(&mut self, x: Reg) {
         let x = self.v[x];
-        self.screen.write(self.i.wrapping_add(2), x % 10);
-        self.screen.write(self.i.wrapping_add(1), x / 10 % 10);
-        self.screen.write(self.i, x / 100 % 10);
+        self.mem.write(self.i.wrapping_add(2), x % 10);
+        self.mem.write(self.i.wrapping_add(1), x / 10 % 10);
+        self.mem.write(self.i, x / 100 % 10);
     }
     /// |`Fx55`| DMA Stor from I to registers 0..=X
     ///
@@ -585,7 +582,7 @@ impl CPU {
     pub(super) fn store_dma(&mut self, x: Reg) {
         let i = self.i as usize;
         for (reg, value) in self
-            .screen
+            .mem
             .get_mut(i..=i + x)
             .unwrap_or_default()
             .iter_mut()
@@ -606,7 +603,7 @@ impl CPU {
     pub(super) fn load_dma(&mut self, x: Reg) {
         let i = self.i as usize;
         for (reg, value) in self
-            .screen
+            .mem
             .get(i..=i + x)
             .unwrap_or_default()
             .iter()
@@ -642,7 +639,7 @@ impl CPU {
     pub(super) fn store_flags(&mut self, x: Reg) {
         // TODO: Save these, maybe
         for (reg, value) in self
-            .screen
+            .mem
             .get_mut(0..=x)
             .unwrap_or_default()
             .iter_mut()
@@ -656,13 +653,7 @@ impl CPU {
     /// I just chuck it in 0x0..0xf. Screw it.
     #[inline(always)]
     pub(super) fn load_flags(&mut self, x: Reg) {
-        for (reg, value) in self
-            .screen
-            .get(0..=x)
-            .unwrap_or_default()
-            .iter()
-            .enumerate()
-        {
+        for (reg, value) in self.mem.get(0..=x).unwrap_or_default().iter().enumerate() {
             self.v[reg] = *value;
         }
     }

src/cpu/tests.rs

@@ -33,7 +33,7 @@ fn setup_environment() -> (CPU, Bus) {
         },
         bus! {
             // Create a screen
-            Screen  [0x0F00..0x1000] = include_bytes!("../../chip8Archive/roms/1dcell.ch8"),
+            Screen  [0x000..0x100] = include_bytes!("../../chip8Archive/roms/1dcell.ch8"),
         },
     );
     ch8.0
@@ -755,7 +755,7 @@ mod io {
                 // Debug mode is 5x slower
                 cpu.flags.debug = false;
                 // Load the test program
-                cpu.screen.load_region(Program, test.program).unwrap();
+                cpu.mem.load_region(Program, test.program).unwrap();
                 // Run the test program for the specified number of steps
                 while cpu.cycle() < test.steps {
                     cpu.multistep(&mut bus, 10.min(test.steps - cpu.cycle()))
@@ -958,7 +958,7 @@ mod io {
 
                 let addr = cpu.i as usize;
                 assert_eq!(
-                    cpu.screen
+                    cpu.mem
                         .get(addr..addr.wrapping_add(5))
                         .expect("Region at addr should exist!"),
                     test.output,
@@ -1004,10 +1004,7 @@ mod io {
 
                 cpu.bcd_convert(5);
 
-                assert_eq!(
-                    cpu.screen.get(addr..addr.saturating_add(3)),
-                    Some(test.output)
-                )
+                assert_eq!(cpu.mem.get(addr..addr.saturating_add(3)), Some(test.output))
             }
         }
     }
@@ -1030,7 +1027,7 @@ mod io {
             cpu.store_dma(len);
             // Check that bus grabbed the correct data
             let bus = cpu
-                .screen
+                .mem
                 .get_mut(addr..addr + DATA.len())
                 .expect("Getting a mutable slice at addr 0x0456 should not fail");
             assert_eq!(bus[0..=len], DATA[0..=len]);
@@ -1048,7 +1045,7 @@ mod io {
         const DATA: &[u8] = b"ABCDEFGHIJKLMNOP";
         // Load some test data into memory
         let addr = 0x456;
-        cpu.screen
+        cpu.mem
             .get_mut(addr..addr + DATA.len())
             .expect("Getting a mutable slice at addr 0x0456..0x0466 should not fail")
             .write_all(DATA)
@@ -1088,8 +1085,8 @@ mod behavior {
         #[test]
         fn sound() {
             let (mut cpu, mut bus) = setup_environment();
-            cpu.flags.monotonic = None; // disable monotonic timing
             cpu.sound = 10.0;
+            cpu.flags.monotonic = false; // disable monotonic timing
             for _ in 0..2 {
                 cpu.multistep(&mut bus, 8)
                     .expect("Running valid instructions should always succeed");

src/cpu/tests/decode.rs

@@ -15,7 +15,7 @@ fn run_single_op(op: &[u8]) -> CPU {
             Screen[0x0..0x1000],
         },
     );
-    cpu.screen
+    cpu.mem
         .load_region(Program, op).unwrap();
     cpu.v = *INDX;
     cpu.flags.quirks = Quirks::from(false);