cpu/tests: Test invalid instructions more exhaustively
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@ -51,41 +51,42 @@ fn print_screen(bytes: &[u8]) {
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/// Unused instructions
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mod unimplemented {
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use super::*;
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#[test]
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fn ins_5xyn() {
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macro_rules! invalid {
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($(
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$(#[$attr:meta])* // Preserve doc comments, etc.
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$pub:vis test $name:ident { $($insn:literal),+$(,)? }
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);+ $(;)?) => {
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$( $(#[$attr])* #[test] $pub fn $name () {$(
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let (mut cpu, mut bus) = setup_environment();
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cpu.screen.write(0x200u16, 0x500fu16);
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cpu.mem.write(0x200u16, $insn as u16);
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cpu.tick(&mut bus)
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.expect_err("0x500f is not an instruction");
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.expect_err(stringify!($insn is not an instruction));
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)*} )+
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};
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}
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#[test]
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fn ins_8xyn() {
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let (mut cpu, mut bus) = setup_environment();
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cpu.screen.write(0x200u16, 0x800fu16);
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cpu.tick(&mut bus)
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.expect_err("0x800f is not an instruction");
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}
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#[test]
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fn ins_9xyn() {
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let (mut cpu, mut bus) = setup_environment();
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cpu.screen.write(0x200u16, 0x900fu16);
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cpu.tick(&mut bus)
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.expect_err("0x900f is not an instruction");
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}
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#[test]
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fn ins_exbb() {
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let (mut cpu, mut bus) = setup_environment();
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cpu.screen.write(0x200u16, 0xe00fu16);
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cpu.tick(&mut bus)
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.expect_err("0xe00f is not an instruction");
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}
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// Fxbb
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#[test]
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fn ins_fxbb() {
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let (mut cpu, mut bus) = setup_environment();
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cpu.screen.write(0x200u16, 0xf00fu16);
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cpu.tick(&mut bus)
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.expect_err("0xf00f is not an instruction");
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invalid! {
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/// Invalid opcodes 5001, 0x5004-500f
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test ins_5xyn {
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0x5001,
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0x5004, 0x5005, 0x5006, 0x5007, 0x5008, 0x5009,
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0x500a, 0x500b, 0x500c, 0x500d, 0x500e, 0x500f,
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};
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/// Invalid opcodes 8008-800d and 800f
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test ins_8xyn {
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0x8008, 0x8009, 0x800a, 0x800b, 0x800c, 0x800d,
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0x800f,
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};
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/// Invalid opcodes 9001-900f
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test ins_9xyn {
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0x9001, 0x9002, 0x9003, 0x9004, 0x9005,
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0x9006, 0x9007, 0x9008, 0x9009, 0x900a,
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0x900b, 0x900c, 0x900d, 0x900e, 0x900f,
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};
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/// Invalid opcodes in e000 range
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test ins_exbb { 0xe00f };
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/// Invalid opcodes in the 0xf000 range
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test ins_fxbb { 0xf001, 0xf00f };
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}
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}
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