Commit Graph

22 Commits

Author SHA1 Message Date
08740d32aa Remove tests module 2024-07-09 02:43:42 -05:00
3d35fe8ae7 Fix some bugs in memory 2024-07-09 01:46:06 -05:00
8e97961955 bweh: Add some cool constants 2024-07-09 01:45:24 -05:00
fb687b9548 io: Fix bank sizes in doc comments 2024-07-09 01:44:02 -05:00
ecde36b995 io: Remove interrupt circuitry (it doesn't belong there anyway) 2024-07-09 01:42:55 -05:00
73e52f6aea banked: Break address translation into its own function 2024-07-09 01:41:32 -05:00
6755d318ba CPU: track total M-cycles 2024-07-09 01:24:08 -05:00
060a6b068b Change small heuristics, add newlines between items 2024-07-09 01:22:32 -05:00
9106d9727f Remove unused {get,set}_r16 2024-07-09 01:12:10 -05:00
268d41be59 Remove excess cycles from reads 2024-07-09 01:09:27 -05:00
a7703ab842 Add magic breakpoint instruction 2024-07-09 01:07:18 -05:00
f760b96d19 POP: Don't allow F.low to be set 2024-07-09 01:06:47 -05:00
fad95d5046 Implement ADD16 2024-07-09 01:05:40 -05:00
a6066d1fdf Implement DAA 2024-07-09 01:05:21 -05:00
1a29412c85 STOP: Print CPU status and continue immediately (STOP sucks) 2024-07-09 01:00:37 -05:00
184054349f CPU constructor overhaul 2024-07-09 00:59:33 -05:00
c971ff47cc disasm: ld a, [c] => ld a, [ff00+c] 2024-06-25 21:23:53 -05:00
14cbfd4112 bugfix: bit r8, n should return true when bit n is zero 2024-06-25 21:21:57 -05:00
dff0df87e9 bugfix: inc r16 should not decrement r16 2024-06-25 21:20:50 -05:00
dbc9552908 bugfix: XOR decoding as OR, and vice versa 2024-06-25 21:19:48 -05:00
b91105bbd1 Move graphics and audio out of lib.rs 2024-06-25 13:36:04 -05:00
acfbb8f1cf boy: Initial public commit
- SM83 implementation kinda works
- Live disassembly, memory write tracing
- Pretty snazzy debugger with custom memory editor
- hexadecimal calculator with novel operator precedence rules
2024-06-22 07:25:59 -05:00