diff --git a/.gitignore b/.gitignore index eadd635..b07584b 100644 --- a/.gitignore +++ b/.gitignore @@ -1,4 +1,5 @@ /target +/notes/*.json # Test ROMs /roms diff --git a/notes/References.md b/notes/References.md new file mode 100644 index 0000000..47a134d --- /dev/null +++ b/notes/References.md @@ -0,0 +1,11 @@ +# References + +## SM83 Instruction Set +- https://gbdev.io/gb-opcodes//optables/darkoctal +- https://rgbds.gbdev.io/docs/v0.7.0/gbz80.7 + +## CPU internals, timings +- https://gist.github.com/SonoSooS/c0055300670d678b5ae8433e20bea595 + +## Hardware, memory map +- https://gbdev.io/pandocs/ diff --git a/notes/instruction_set.md b/notes/instruction_set.md new file mode 100644 index 0000000..27b01cd --- /dev/null +++ b/notes/instruction_set.md @@ -0,0 +1,126 @@ +# Instruction Encodings +| Mnemonic | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +|------------|---|---|---|---|---|---|---|---| +|r8 | | | x | x | x | | | | +|r8(alt) | | | | | | x | x | x | +|r16 | | | x | x | | | | | +|r16stk | | | x | x | | | | | +|r16mem | | | x | x | | | | | +|cond | | | | x | x | | | | +|b3 | | | x | x | x | | | | +|tgt3 | | | x | x | x | | | | +|u8 | | | | | | | | | +|imm16 | | | | | | | | | + +# Block 1 : Uncategorized + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + | | | | | | | | `nop` + | | | 1 | 1 | | | | `jr u8` + | | 1 | C | C | | | | `jr cond(C), u8` + + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + | | | | 1 | | | | + | | | 1 | | | | | + | | | 1 | 1 | | | | + | | 1 | | | | | | + | | 1 | | 1 | | | | + | | 1 | 1 | | | | | + | | 1 | 1 | 1 | | | | + +# Block 1: 8-bit r2r loads + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + | 1 | 1 | 1 | | 1 | 1 | | `halt` + | 1 | D | D | D | S | S | S | `ld rD, rS` + +# Block 2: 8-bit arithmetic + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + 1 | | | | |`R`|`R`|`R`| `add a, R` + 1 | | | | 1 |`R`|`R`|`R`| `adc a, R` + 1 | | | 1 | |`R`|`R`|`R`| `sub a, R` + 1 | | | 1 | 1 |`R`|`R`|`R`| `sbc a, R` + 1 | | 1 | | |`R`|`R`|`R`| `and a, R` + 1 | | 1 | | 1 |`R`|`R`|`R`| `or a, R` + 1 | | 1 | 1 | |`R`|`R`|`R`| `xor a, R` + 1 | | 1 | 1 | 1 |`R`|`R`|`R`| `cp a, R` + +# Block 3: Etc. +## Table 0 + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + 1 | 1 | | C | C | | | | `ret cond(C)` + 1 | 1 | 1 | | | | | | `ldh [ff00 + u8], a` + 1 | 1 | 1 | | 1 | | | | `add sp, u8` + 1 | 1 | 1 | 1 | | | | | `ldh a, [ff00 + u8]` + 1 | 1 | 1 | 1 | 1 | | | | `ldh HL, [c]` +## Table 1 + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + 1 | 1 |`R`|`R`| | | | 1 | `pop r16stk(R)` + 1 | 1 | | | 1 | | | 1 | `ret` + 1 | 1 | | 1 | 1 | | | 1 | `reti` + 1 | 1 | 1 | | 1 | | | 1 | `jp hl` + 1 | 1 | 1 | 1 | 1 | | | 1 | `ld sp, hl` +## Table 2 + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + 1 | 1 | |`C`|`C`| | 1 | | `jp cond(C), imm16` + 1 | 1 | 1 | | | | 1 | | `ld [c], a` + 1 | 1 | 1 | | 1 | | 1 | | `ld [imm16], a` + 1 | 1 | 1 | 1 | | | 1 | | `ld a, [c]` + 1 | 1 | 1 | 1 | 1 | | 1 | | `ld a, [imm16]` +## Table 3 + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + 1 | 1 | | | | | 1 | 1 | `jp imm16` + 1 | 1 | | | 1 | | 1 | 1 | Prefix xCB + | | | | | | | | ... Invalid (No opcode fetch) + 1 | 1 | 1 | 1 | | | 1 | 1 | `di` + 1 | 1 | 1 | 1 | 1 | | 1 | 1 | `ei` +## Table 4 + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + 1 | 1 | |`C`|`C`| 1 | | | `call cond(C), imm16` + 1 | 1 | 1 | X | Y | 1 | | | Invalid (No opcode fetch) +## Table 5 + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + 1 | 1 |`R`|`R`| | 1 | | 1 | `push r16stk(R)` + 1 | 1 | | | 1 | 1 | | 1 | `call imm16` + 1 | 1 | X | Y | 1 | 1 | | 1 | if X | Y: Invalid (No opcode fetch) +## Table 6: Arithmetic with 8-bit immediate + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + 1 | 1 | | | | 1 | 1 | | `add a, u8` + 1 | 1 | | | 1 | 1 | 1 | | `adc a, u8` + 1 | 1 | | 1 | | 1 | 1 | | `sub a, u8` + 1 | 1 | | 1 | 1 | 1 | 1 | | `sbc a, u8` + 1 | 1 | 1 | | | 1 | 1 | | `and a, u8` + 1 | 1 | 1 | | 1 | 1 | 1 | | `xor a, u8` + 1 | 1 | 1 | 1 | | 1 | 1 | | `or a, u8` + 1 | 1 | 1 | 1 | 1 | 1 | 1 | | `cp a, u8` +## Table 7: Reset vectors + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + 1 | 1 |`T`|`T`|`T`| 1 | 1 | 1 | `rst (T * 8)` + +# CB-prefix instructions: + 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Mnemonic +---|---|---|---|---|---|---|---|---------- + | | | | | R | R | R | `rlc R` + | | | | 1 | R | R | R | `rrc R` + | | | 1 | | R | R | R | `rl R` + | | | 1 | 1 | R | R | R | `rr R` + | | 1 | | | R | R | R | `sla R` + | | 1 | | 1 | R | R | R | `sra R` + | | 1 | 1 | | R | R | R | `swap R` + | | 1 | 1 | 1 | R | R | R | `srl R` + + 7 | 6 | 5 | 4 | 3 | 2 | 1 | | Mnemonic +---|---|---|---|---|---|---|---|---------- + | 1 | i | i | i | R | R | R | `bit i, R` + 1 | | i | i | i | R | R | R | `res i, R` + 1 | 1 | i | i | i | R | R | R | `set i, R` diff --git a/notes/todo_insn_decode.md b/notes/todo_insn_decode.md new file mode 100644 index 0000000..57f42f3 --- /dev/null +++ b/notes/todo_insn_decode.md @@ -0,0 +1,272 @@ +```rust + // TODO: Do this instead of instruction decode + #[allow(unused)] + #[rustfmt::skip] + pub const INS: [fn(&mut CPU, &mut dyn BusIO) -> IResult; 256] = [ + |cpu, _bus| cpu.nop(), // 000 nop + |_cpu, _bus| Ok(()), // 001 ld bc, n16 + |_cpu, _bus| Ok(()), // 002 ld [bc], a + |_cpu, _bus| Ok(()), // 003 inc bc + |_cpu, _bus| Ok(()), // 004 inc b + |_cpu, _bus| Ok(()), // 005 dec b + |_cpu, _bus| Ok(()), // 006 ld b,n8 + |_cpu, _bus| Ok(()), // 007 rlca + |_cpu, _bus| Ok(()), // 010 ld [a16], sp + |_cpu, _bus| Ok(()), // 011 add hl, bc + |_cpu, _bus| Ok(()), // 012 ld a, [bc] + |_cpu, _bus| Ok(()), // 013 dec bc + |_cpu, _bus| Ok(()), // 014 inc c + |_cpu, _bus| Ok(()), // 015 dec c + |_cpu, _bus| Ok(()), // 016 ld c, n8 + |_cpu, _bus| Ok(()), // 017 rrca + |_cpu, _bus| Ok(()), // 020 stop n8 + |_cpu, _bus| Ok(()), // 021 ld de, n16 + |_cpu, _bus| Ok(()), // 022 ld [de], a + |_cpu, _bus| Ok(()), // 023 inc de + |_cpu, _bus| Ok(()), // 024 inc d + |_cpu, _bus| Ok(()), // 025 dec d + |_cpu, _bus| Ok(()), // 026 ld d, n8 + |_cpu, _bus| Ok(()), // 027 rla + |_cpu, _bus| Ok(()), // 030 jr e8 + |_cpu, _bus| Ok(()), // 031 add hl, de + |_cpu, _bus| Ok(()), // 032 ld a, [de] + |_cpu, _bus| Ok(()), // 033 dec de + |_cpu, _bus| Ok(()), // 034 inc e + |_cpu, _bus| Ok(()), // 035 dec e + |_cpu, _bus| Ok(()), // 036 ld e, n8 + |_cpu, _bus| Ok(()), // 037 rra + |_cpu, _bus| Ok(()), // 040 jr nz, e8 + |_cpu, _bus| Ok(()), // 041 ld hl, n16 + |_cpu, _bus| Ok(()), // 042 ld [hl+], a + |_cpu, _bus| Ok(()), // 043 inc hl + |_cpu, _bus| Ok(()), // 044 inc h + |_cpu, _bus| Ok(()), // 045 dec h + |_cpu, _bus| Ok(()), // 046 ld h, n8 + |_cpu, _bus| Ok(()), // 047 daa + |_cpu, _bus| Ok(()), // 050 jr z, e8 + |_cpu, _bus| Ok(()), // 051 add hl, hl + |_cpu, _bus| Ok(()), // 052 ld a [hl+] + |_cpu, _bus| Ok(()), // 053 dec hl + |_cpu, _bus| Ok(()), // 054 inc l + |_cpu, _bus| Ok(()), // 055 dec l + |_cpu, _bus| Ok(()), // 056 ld l, n8 + |_cpu, _bus| Ok(()), // 057 cpl + |_cpu, _bus| Ok(()), // 060 jr nc, e8 + |_cpu, _bus| Ok(()), // 061 ld sp, n16 + |_cpu, _bus| Ok(()), // 062 ld [hl-], a + |_cpu, _bus| Ok(()), // 063 inc sp + |_cpu, _bus| Ok(()), // 064 inc [hl] + |_cpu, _bus| Ok(()), // 065 dec [hl] + |_cpu, _bus| Ok(()), // 066 ld [hl], n8 + |_cpu, _bus| Ok(()), // 067 scf + |_cpu, _bus| Ok(()), // 070 jr c, e8 + |_cpu, _bus| Ok(()), // 071 add hl, sp + |_cpu, _bus| Ok(()), // 072 ld a, [hl-] + |_cpu, _bus| Ok(()), // 073 dec sp + |_cpu, _bus| Ok(()), // 074 inc a + |_cpu, _bus| Ok(()), // 075 dec a + |_cpu, _bus| Ok(()), // 076 ld a, n8 + |_cpu, _bus| Ok(()), // 077 ccf + + |_cpu, _bus| Ok(()), // 100 ld b, b + |cpu, _bus| { cpu[R8::B] = cpu[R8::C]; Ok(()) }, // 101 ld b, c + |cpu, _bus| { cpu[R8::B] = cpu[R8::D]; Ok(()) }, // 102 ld b, d + |cpu, _bus| { cpu[R8::B] = cpu[R8::E]; Ok(()) }, // 103 ld b, e + |cpu, _bus| { cpu[R8::B] = cpu[R8::H]; Ok(()) }, // 104 ld b, h + |cpu, _bus| { cpu[R8::B] = cpu[R8::L]; Ok(()) }, // 105 ld b, l + |_cpu, _bus| Ok(()), // 106 ld b, [hl] + |cpu, _bus| { cpu[R8::B] = cpu[R8::A]; Ok(()) }, // 107 ld b, a + |cpu, _bus| { cpu[R8::C] = cpu[R8::B]; Ok(()) }, // 110 ld c, b + |_cpu, _bus| Ok(()), // 111 ld c, c + |cpu, _bus| { cpu[R8::C] = cpu[R8::D]; Ok(()) }, // 112 ld c, d + |cpu, _bus| { cpu[R8::C] = cpu[R8::E]; Ok(()) }, // 113 ld c, e + |cpu, _bus| { cpu[R8::C] = cpu[R8::H]; Ok(()) }, // 114 ld c, h + |cpu, _bus| { cpu[R8::C] = cpu[R8::L]; Ok(()) }, // 115 ld c, l + |_cpu, _bus| Ok(()), // 116 ld c, [hl] + |cpu, _bus| { cpu[R8::C] = cpu[R8::A]; Ok(()) }, // 117 ld c, a + |cpu, _bus| { cpu[R8::D] = cpu[R8::B]; Ok(()) }, // 120 ld d, b + |cpu, _bus| { cpu[R8::D] = cpu[R8::C]; Ok(()) }, // 121 ld d, c + |_cpu, _bus| Ok(()), // 122 ld d, d + |cpu, _bus| { cpu[R8::D] = cpu[R8::E]; Ok(()) }, // 123 ld d, e + |cpu, _bus| { cpu[R8::D] = cpu[R8::H]; Ok(()) }, // 124 ld d, h + |cpu, _bus| { cpu[R8::D] = cpu[R8::L]; Ok(()) }, // 125 ld d, l + |_cpu, _bus| Ok(()), // 126 ld d, [hl] + |cpu, _bus| { cpu[R8::D] = cpu[R8::A]; Ok(()) }, // 127 ld d, a + |cpu, _bus| { cpu[R8::E] = cpu[R8::B]; Ok(()) }, // 130 ld e, b + |cpu, _bus| { cpu[R8::E] = cpu[R8::C]; Ok(()) }, // 131 ld e, c + |cpu, _bus| { cpu[R8::E] = cpu[R8::D]; Ok(()) }, // 132 ld e, d + |_cpu, _bus| Ok(()), // 133 ld e, e + |cpu, _bus| { cpu[R8::E] = cpu[R8::H]; Ok(()) }, // 134 ld e, h + |cpu, _bus| { cpu[R8::E] = cpu[R8::L]; Ok(()) }, // 135 ld e, l + |_cpu, _bus| Ok(()), // 136 ld e, [hl] + |cpu, _bus| { cpu[R8::E] = cpu[R8::A]; Ok(()) }, // 137 ld e, a + |cpu, _bus| { cpu[R8::H] = cpu[R8::B]; Ok(()) }, // 140 ld h, b + |cpu, _bus| { cpu[R8::H] = cpu[R8::C]; Ok(()) }, // 141 ld h, c + |cpu, _bus| { cpu[R8::H] = cpu[R8::D]; Ok(()) }, // 142 ld h, d + |cpu, _bus| { cpu[R8::H] = cpu[R8::E]; Ok(()) }, // 143 ld h, e + |_cpu, _bus| Ok(()), // 144 ld h, h + |cpu, _bus| { cpu[R8::H] = cpu[R8::L]; Ok(()) }, // 145 ld h, l + |_cpu, _bus| Ok(()), // 146 ld h, [hl] + |cpu, _bus| { cpu[R8::H] = cpu[R8::A]; Ok(()) }, // 147 ld h, a + |cpu, _bus| { cpu[R8::L] = cpu[R8::B]; Ok(()) }, // 150 ld l, b + |cpu, _bus| { cpu[R8::L] = cpu[R8::C]; Ok(()) }, // 151 ld l, c + |cpu, _bus| { cpu[R8::L] = cpu[R8::D]; Ok(()) }, // 152 ld l, d + |cpu, _bus| { cpu[R8::L] = cpu[R8::E]; Ok(()) }, // 153 ld l, e + |cpu, _bus| { cpu[R8::L] = cpu[R8::H]; Ok(()) }, // 154 ld l, h + |_cpu, _bus| Ok(()), // 155 ld l, l + |_cpu, _bus| Ok(()), // 156 ld l, [hl] + |cpu, _bus| { cpu[R8::L] = cpu[R8::A]; Ok(()) }, // 157 ld l, a + |_cpu, _bus| Ok(()), // 160 ld [hl], b + |_cpu, _bus| Ok(()), // 161 ld [hl], c + |_cpu, _bus| Ok(()), // 162 ld [hl], d + |_cpu, _bus| Ok(()), // 163 ld [hl], e + |_cpu, _bus| Ok(()), // 164 ld [hl], h + |_cpu, _bus| Ok(()), // 165 ld [hl], l + |_cpu, _bus| Ok(()), // 166 halt + |_cpu, _bus| Ok(()), // 167 ld [hl], a + |cpu, _bus| { cpu[R8::A] = cpu[R8::B]; Ok(()) }, // 170 ld a, b + |cpu, _bus| { cpu[R8::A] = cpu[R8::C]; Ok(()) }, // 171 ld a, c + |cpu, _bus| { cpu[R8::A] = cpu[R8::D]; Ok(()) }, // 172 ld a, d + |cpu, _bus| { cpu[R8::A] = cpu[R8::E]; Ok(()) }, // 173 ld a, e + |cpu, _bus| { cpu[R8::A] = cpu[R8::H]; Ok(()) }, // 174 ld a, h + |cpu, _bus| { cpu[R8::A] = cpu[R8::L]; Ok(()) }, // 175 ld a, l + |_cpu, _bus| Ok(()), // 176 ld a, [hl] + |_cpu, _bus| Ok(()), // 177 ld a, a + |_cpu, _bus| Ok(()), // 200 add a, b + |_cpu, _bus| Ok(()), // 201 add a, c + |_cpu, _bus| Ok(()), // 202 add a, d + |_cpu, _bus| Ok(()), // 203 add a, e + |_cpu, _bus| Ok(()), // 204 add a, h + |_cpu, _bus| Ok(()), // 205 add a, l + |_cpu, _bus| Ok(()), // 206 add a, [hl] + |_cpu, _bus| Ok(()), // 207 add a, a + |_cpu, _bus| Ok(()), // 210 adc a, b + |_cpu, _bus| Ok(()), // 211 adc a, c + |_cpu, _bus| Ok(()), // 212 adc a, d + |_cpu, _bus| Ok(()), // 213 adc a, e + |_cpu, _bus| Ok(()), // 214 adc a, h + |_cpu, _bus| Ok(()), // 215 adc a, l + |_cpu, _bus| Ok(()), // 216 adc a, [hl] + |_cpu, _bus| Ok(()), // 217 adc a, a + |_cpu, _bus| Ok(()), // 220 sub a, b + |_cpu, _bus| Ok(()), // 221 sub a, c + |_cpu, _bus| Ok(()), // 222 sub a, d + |_cpu, _bus| Ok(()), // 223 sub a, e + |_cpu, _bus| Ok(()), // 224 sub a, h + |_cpu, _bus| Ok(()), // 225 sub a, l + |_cpu, _bus| Ok(()), // 226 sub a, [hl] + |_cpu, _bus| Ok(()), // 227 sub a, a + |_cpu, _bus| Ok(()), // 230 sbc a, b + |_cpu, _bus| Ok(()), // 231 sbc a, c + |_cpu, _bus| Ok(()), // 232 sbc a, d + |_cpu, _bus| Ok(()), // 233 sbc a, e + |_cpu, _bus| Ok(()), // 234 sbc a, h + |_cpu, _bus| Ok(()), // 235 sbc a, l + |_cpu, _bus| Ok(()), // 236 sbc a, [hl] + |_cpu, _bus| Ok(()), // 237 sbc a, a + |_cpu, _bus| Ok(()), // 240 and a, b + |_cpu, _bus| Ok(()), // 241 and a, c + |_cpu, _bus| Ok(()), // 242 and a, d + |_cpu, _bus| Ok(()), // 243 and a, e + |_cpu, _bus| Ok(()), // 244 and a, h + |_cpu, _bus| Ok(()), // 245 and a, l + |_cpu, _bus| Ok(()), // 246 and a, [hl] + |_cpu, _bus| Ok(()), // 247 and a, a + |_cpu, _bus| Ok(()), // 250 xor a, b + |_cpu, _bus| Ok(()), // 251 xor a, c + |_cpu, _bus| Ok(()), // 252 xor a, d + |_cpu, _bus| Ok(()), // 253 xor a, e + |_cpu, _bus| Ok(()), // 254 xor a, h + |_cpu, _bus| Ok(()), // 255 xor a, l + |_cpu, _bus| Ok(()), // 256 xor a, [hl] + |_cpu, _bus| Ok(()), // 257 xor a, a + |_cpu, _bus| Ok(()), // 260 or a, b + |_cpu, _bus| Ok(()), // 261 or a, c + |_cpu, _bus| Ok(()), // 262 or a, d + |_cpu, _bus| Ok(()), // 263 or a, e + |_cpu, _bus| Ok(()), // 264 or a, h + |_cpu, _bus| Ok(()), // 265 or a, l + |_cpu, _bus| Ok(()), // 266 or a, [hl] + |_cpu, _bus| Ok(()), // 267 or a, a + |_cpu, _bus| Ok(()), // 270 cmp a, b + |_cpu, _bus| Ok(()), // 271 cmp a, c + |_cpu, _bus| Ok(()), // 272 cmp a, d + |_cpu, _bus| Ok(()), // 273 cmp a, e + |_cpu, _bus| Ok(()), // 274 cmp a, h + |_cpu, _bus| Ok(()), // 275 cmp a, l + |_cpu, _bus| Ok(()), // 276 cmp a, [hl] + |_cpu, _bus| Ok(()), // 277 cmp a, a + + |_cpu, _bus| Ok(()), // 0300 ret nz + |_cpu, _bus| Ok(()), // 0301 pop bc + |_cpu, _bus| Ok(()), // 0302 jp nz, a16 + |_cpu, _bus| Ok(()), // 0303 jp a16 + |_cpu, _bus| Ok(()), // 0304 call nz, a16 + |_cpu, _bus| Ok(()), // 0305 push bc + |_cpu, _bus| Ok(()), // 0306 add a, n8 + |_cpu, _bus| Ok(()), // 0307 rst $00 + + |_cpu, _bus| Ok(()), // 0310 ret z + |_cpu, _bus| Ok(()), // 0311 ret + |_cpu, _bus| Ok(()), // 0312 jp z, a16 + |_cpu, _bus| Ok(()), // 0313 PREFIX 0xCB + |_cpu, _bus| Ok(()), // 0314 call z, a16 + |_cpu, _bus| Ok(()), // 0315 call a16 + |_cpu, _bus| Ok(()), // 0316 adc a, n8 + |_cpu, _bus| Ok(()), // 0317 rst $08 + + |_cpu, _bus| Ok(()), // 0320 ret nc + |_cpu, _bus| Ok(()), // 0321 pop de + |_cpu, _bus| Ok(()), // 0322 jp nc, a16 + |_cpu, _bus| Ok(()), // 0323 -- + |_cpu, _bus| Ok(()), // 0324 call nc, a16 + |_cpu, _bus| Ok(()), // 0325 push de + |_cpu, _bus| Ok(()), // 0326 sub a, n8 + |_cpu, _bus| Ok(()), // 0327 rst $10 + + |_cpu, _bus| Ok(()), // 0330 ret c + |_cpu, _bus| Ok(()), // 0331 reti + |_cpu, _bus| Ok(()), // 0332 jp c, a16 + |_cpu, _bus| Ok(()), // 0333 -- + |_cpu, _bus| Ok(()), // 0334 call c, a16 + |_cpu, _bus| Ok(()), // 0335 -- + |_cpu, _bus| Ok(()), // 0336 sbc a, n8 + |_cpu, _bus| Ok(()), // 0337 rst $18 + + |_cpu, _bus| Ok(()), // 0340 ldh [a8], a + |_cpu, _bus| Ok(()), // 0341 pop hl + |_cpu, _bus| Ok(()), // 0342 ld [c], a + |_cpu, _bus| Ok(()), // 0343 -- + |_cpu, _bus| Ok(()), // 0344 -- + |_cpu, _bus| Ok(()), // 0345 push hl + |_cpu, _bus| Ok(()), // 0346 and a, n8 + |_cpu, _bus| Ok(()), // 0347 rst $20 + + |_cpu, _bus| Ok(()), // 0350 add sp, e8 + |_cpu, _bus| Ok(()), // 0351 jp hl + |_cpu, _bus| Ok(()), // 0352 ld [a16], a + |_cpu, _bus| Ok(()), // 0353 -- + |_cpu, _bus| Ok(()), // 0354 -- + |_cpu, _bus| Ok(()), // 0355 -- + |_cpu, _bus| Ok(()), // 0356 xor a, n8 + |_cpu, _bus| Ok(()), // 0357 rst $28 + + |_cpu, _bus| Ok(()), // 0360 ldh a, [a8] + |_cpu, _bus| Ok(()), // 0361 pop af + |_cpu, _bus| Ok(()), // 0362 ld a, [c] + |_cpu, _bus| Ok(()), // 0363 di + |_cpu, _bus| Ok(()), // 0364 -- + |_cpu, _bus| Ok(()), // 0365 push af + |_cpu, _bus| Ok(()), // 0366 or a, n8 + |_cpu, _bus| Ok(()), // 0367 rst $30 + + |_cpu, _bus| Ok(()), // 0370 ld hl, sp + e8 + |_cpu, _bus| Ok(()), // 0371 ld sp, hl + |_cpu, _bus| Ok(()), // 0372 ld a, [a16] + |_cpu, _bus| Ok(()), // 0373 ei + |_cpu, _bus| Ok(()), // 0374 -- + |_cpu, _bus| Ok(()), // 0375 -- + |_cpu, _bus| Ok(()), // 0376 cp a, n8 + |_cpu, _bus| Ok(()), // 0377 rst $38 + ]; + ```