diff --git a/src/cpu.rs b/src/cpu.rs
index 28dc533..ed99c33 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -68,6 +68,7 @@ pub struct CPU {
     hl: SplitRegister,
     /// The number of processor cycles executed in the last instruction
     m_cycles: u8,
+    total_cycles: usize,
     /// [Interrupt Master Enable](https://gbdev.io/pandocs/Interrupts.html#ime-interrupt-master-enable-flag-write-only)
     ime: Ime,
     /// The set of breakpoints
@@ -244,8 +245,10 @@ impl CPU {
     }
 
     /// Waits one M-Cycle (does not delay)
+    #[inline]
     pub fn wait(&mut self) -> &mut Self {
         self.m_cycles += 1;
+        self.total_cycles = self.total_cycles.wrapping_add(1);
         self
     }
 }
@@ -1146,16 +1149,15 @@ impl IndexMut<R16Stack> for CPU {
 impl Display for CPU {
     fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
         #[rustfmt::skip]
-        let Self { ir, sp, pc, af, bc, de, hl, m_cycles, ime, breakpoints } = self;
+        let Self { ir, sp, pc, af, bc, de, hl, m_cycles, total_cycles, ime, breakpoints } = self;
         writeln!(f, "Current instruction: {ir}\nPC: {pc:04x}\nSP: {sp:04x}")?;
         writeln!(f, "A: {:02x}, F: {}", af.hi(), flag!(af, z, n, h, c))?;
-        // writeln!(f, "A: {:02x}, F: {:04b}", af.hi(), af.lo() >> 4)?;
         writeln!(f, "B: {:02x}, C: {:02x}", bc.hi(), bc.lo())?;
         writeln!(f, "D: {:02x}, E: {:02x}", de.hi(), de.lo())?;
         writeln!(f, "H: {:02x}, L: {:02x}", hl.hi(), hl.lo())?;
         write!(
             f,
-            "Cycles: {m_cycles}\nInterrupts {}",
+            "Cycles: {total_cycles} ({m_cycles})\nInterrupts {}",
             match ime {
                 Ime::Disabled => "Disabled",
                 Ime::ShouldEnable => "Should be Enabled",