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John 2024-06-25 13:36:25 -05:00
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Game Boy audio register descriptions
NR_0 NR_1 NR_2 NR_3 NR_4 addresses
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
NR1_: _ P P P D I I I d d L L L L L L V V V V E p p p l l l l l l l l T e _ _ _ h h h 0x10..0x15
NR2_: _ _ _ _ _ _ _ _ d d L L L L L L V V V V E p p p l l l l l l l l T e _ _ _ h h h 0x15..0x1a
NR3_: A _ _ _ _ _ _ _ L L L L L L L L _ V V _ _ _ _ _ l l l l l l l l T e _ _ _ h h h 0x1a..0x20
NR4_: _ _ _ _ _ _ _ _ _ _ L L L L L L V V V V E p p p S S S S W c c c T e _ _ _ _ _ _ 0x20..0x25
Comb: A P P P D I I I L L L L L L L L V V V V E p p p l l l l l l l l T e _ _ _ h h h
d d S S S S W c c c
Key:
A: DAC Enable
P: Sweep Pace
D: Sweep Direction
I: Sweep Individual step
d: Duty Cycle
L: Length Timer Initialization Value
V: Envelope Volume Initialization Value
E: Envelope Direction
p: Envelope Pace
l: Period Low Byte
S: Clock Shift
W: LFSR Width
c: Clock Divider
T: Trigger
e: Length Enable
h: Period High Bits
Analog Pipeline Control Registers:
NR_0 NR_1 NR_2 NR_3 NR_4
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
NR5_: Z L L L z R R R V W X Y v w x y P _ _ _ A B C D
Key:
Zz: Channel 5 (VIN) Left and right sound panning
Vv: Channel 1 Left and right sound panning
Ww: Channel 2 Left and right sound panning
Xx: Channel 3 Left and right sound panning
Yy: Channel 4 Left and right sound panning
P: APU power
A: Channel 1 status
B: Channel 2 status
C: Channel 3 status
D: Channel 4 status
Source:
https://gbdev.io/pandocs/Audio_Registers.html